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| author | Quentin Schulz <quentin.schulz@bootlin.com> | 2018-10-04 14:22:08 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2018-10-05 14:36:44 -0700 |
| commit | 71e32a20cfbf0e53f43117337d355ea505f8f081 (patch) | |
| tree | 5ff8e5ac17b1b40fc1f36aa10b6f1939f8ca2033 /drivers/net/ethernet/mscc/ocelot_regs.c | |
| parent | 51f6b410fc220d8a5a4fae00ebfd8243b6c11d4e (diff) | |
| download | linux-71e32a20cfbf0e53f43117337d355ea505f8f081.tar.gz linux-71e32a20cfbf0e53f43117337d355ea505f8f081.tar.bz2 linux-71e32a20cfbf0e53f43117337d355ea505f8f081.zip | |
net: mscc: ocelot: make use of SerDes PHYs for handling their configuration
Previously, the SerDes muxing was hardcoded to a given mode in the MAC
controller driver. Now, the SerDes muxing is configured within the
Device Tree and is enforced in the MAC controller driver so we can have
a lot of different SerDes configurations.
Make use of the SerDes PHYs in the MAC controller to set up the SerDes
according to the SerDes<->switch port mapping and the communication mode
with the Ethernet PHY.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mscc/ocelot_regs.c')
| -rw-r--r-- | drivers/net/ethernet/mscc/ocelot_regs.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mscc/ocelot_regs.c b/drivers/net/ethernet/mscc/ocelot_regs.c index 2518ce0fe265..9271af18b93b 100644 --- a/drivers/net/ethernet/mscc/ocelot_regs.c +++ b/drivers/net/ethernet/mscc/ocelot_regs.c @@ -5,6 +5,7 @@ * Copyright (c) 2017 Microsemi Corporation */ #include "ocelot.h" +#include <soc/mscc/ocelot_hsio.h> static const u32 ocelot_ana_regmap[] = { REG(ANA_ADVLEARN, 0x009000), |