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authorEugene Surovegin <ebs@ebshome.net>2005-10-29 12:43:14 -0700
committerJeff Garzik <jgarzik@pobox.com>2005-10-29 18:06:54 -0400
commit7ad8a89c2e8a930a902cb0622956b27796c027e5 (patch)
treec1241696b8fc5ab55d389f9accd80f399e3d9d86 /drivers/net/ibm_emac/ibm_emac_mal.h
parentbe15cd72d256e5eb3261a781b8507fac83ab33f6 (diff)
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[PATCH] PPC 44x EMAC driver: add 440SPe support
For some reason, the hardware designers made the polarity of one bit in the 440SPe's PHY interface register the opposite of all other PPC 440 chips. To handle this, abstract our access to this bit and do the right thing based on the configured CPU type. Signed-off-by: Roland Dreier <rolandd@cisco.com> Signed-off-by: Eugene Surovegin <ebs@ebshome.net> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers/net/ibm_emac/ibm_emac_mal.h')
-rw-r--r--drivers/net/ibm_emac/ibm_emac_mal.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ibm_emac/ibm_emac_mal.h b/drivers/net/ibm_emac/ibm_emac_mal.h
index 15b0bdae26ac..fb6dfe1197b2 100644
--- a/drivers/net/ibm_emac/ibm_emac_mal.h
+++ b/drivers/net/ibm_emac/ibm_emac_mal.h
@@ -34,7 +34,8 @@
#if defined(CONFIG_405GP) || defined(CONFIG_405GPR) || defined(CONFIG_405EP) || \
defined(CONFIG_440EP) || defined(CONFIG_NP405H)
#define MAL_VERSION 1
-#elif defined(CONFIG_440GP) || defined(CONFIG_440GX) || defined(CONFIG_440SP)
+#elif defined(CONFIG_440GP) || defined(CONFIG_440GX) || defined(CONFIG_440SP) || \
+ defined(CONFIG_440SPE)
#define MAL_VERSION 2
#else
#error "Unknown SoC, please check chip manual and choose MAL 'version'"