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authorAndrew Lunn <andrew@lunn.ch>2017-10-31 20:31:28 +0100
committerDavid S. Miller <davem@davemloft.net>2017-11-01 11:26:08 +0900
commit14fc0abafe159fbe8bbcfeca157ef3ba139fa75f (patch)
tree077b5bd3eabd726e9edaa8e78021a7eaa13ed559 /drivers/net/phy/marvell.c
parentb34a264fabdce972ca8d1cff38d1b48ecb963719 (diff)
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net: phy: marvell: Only configure RGMII delays when using RGMII
The fix 5987feb38aa5 ("net: phy: marvell: logical vs bitwise OR typo") uncovered another bug in the Marvell PHY driver, which broke the Marvell OpenRD platform. It relies on the bootloader configuring the RGMII delays and does not specify a phy-mode in its device tree. The PHY driver should only configure RGMII delays if the phy mode indicates it is using RGMII. Without anything in device tree, the mv643xx Ethernet driver defaults to GMII. Fixes: 5987feb38aa5 ("net: phy: marvell: logical vs bitwise OR typo") Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/marvell.c')
-rw-r--r--drivers/net/phy/marvell.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 15cbcdba618a..4d02b27df044 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -681,9 +681,11 @@ static int m88e1116r_config_init(struct phy_device *phydev)
if (err < 0)
return err;
- err = m88e1121_config_aneg_rgmii_delays(phydev);
- if (err < 0)
- return err;
+ if (phy_interface_is_rgmii(phydev)) {
+ err = m88e1121_config_aneg_rgmii_delays(phydev);
+ if (err < 0)
+ return err;
+ }
err = genphy_soft_reset(phydev);
if (err < 0)