diff options
| author | Woojung Huh <woojung.huh@microchip.com> | 2016-12-07 20:26:25 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-12-08 14:21:47 -0500 |
| commit | 02dc1f3d613d5a859513d7416c9aca370425a7e0 (patch) | |
| tree | 81ef9e3bc90e38e3943d0dd5f074d3f580bd1af4 /drivers/net/usb/lan78xx.h | |
| parent | f38e7a32ee4fc9c8aeeac59e6e0462cd281586e3 (diff) | |
| download | linux-02dc1f3d613d5a859513d7416c9aca370425a7e0.tar.gz linux-02dc1f3d613d5a859513d7416c9aca370425a7e0.tar.bz2 linux-02dc1f3d613d5a859513d7416c9aca370425a7e0.zip | |
lan78xx: add LAN7801 MAC only support
Add LAN7801 MAC only support with phy fixup functions.
Signed-off-by: Woojung Huh <woojung.huh@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/usb/lan78xx.h')
| -rw-r--r-- | drivers/net/usb/lan78xx.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/net/usb/lan78xx.h b/drivers/net/usb/lan78xx.h index 40927906109a..25aa54611774 100644 --- a/drivers/net/usb/lan78xx.h +++ b/drivers/net/usb/lan78xx.h @@ -108,6 +108,7 @@ #define ID_REV_CHIP_REV_MASK_ (0x0000FFFF) #define ID_REV_CHIP_ID_7800_ (0x7800) #define ID_REV_CHIP_ID_7850_ (0x7850) +#define ID_REV_CHIP_ID_7801_ (0x7801) #define FPGA_REV (0x04) #define FPGA_REV_MINOR_MASK_ (0x0000FF00) @@ -550,6 +551,7 @@ #define LTM_INACTIVE1_TIMER10_ (0x0000FFFF) #define MAC_CR (0x100) +#define MAC_CR_GMII_EN_ (0x00080000) #define MAC_CR_EEE_TX_CLK_STOP_EN_ (0x00040000) #define MAC_CR_EEE_EN_ (0x00020000) #define MAC_CR_EEE_TLAR_EN_ (0x00010000) @@ -787,6 +789,18 @@ #define PHY_DEV_ID_MODEL_MASK_ (0x0FC00000) #define PHY_DEV_ID_OUI_MASK_ (0x003FFFFF) +#define RGMII_TX_BYP_DLL (0x708) +#define RGMII_TX_BYP_DLL_TX_TUNE_ADJ_MASK_ (0x000FC00) +#define RGMII_TX_BYP_DLL_TX_TUNE_SEL_MASK_ (0x00003F0) +#define RGMII_TX_BYP_DLL_TX_DLL_RESET_ (0x0000002) +#define RGMII_TX_BYP_DLL_TX_DLL_BYPASS_ (0x0000001) + +#define RGMII_RX_BYP_DLL (0x70C) +#define RGMII_RX_BYP_DLL_RX_TUNE_ADJ_MASK_ (0x000FC00) +#define RGMII_RX_BYP_DLL_RX_TUNE_SEL_MASK_ (0x00003F0) +#define RGMII_RX_BYP_DLL_RX_DLL_RESET_ (0x0000002) +#define RGMII_RX_BYP_DLL_RX_DLL_BYPASS_ (0x0000001) + #define OTP_BASE_ADDR (0x00001000) #define OTP_ADDR_RANGE_ (0x1FF) |