diff options
| author | Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> | 2014-06-24 00:07:13 +0200 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2014-06-25 15:40:35 -0400 |
| commit | e5c3ef3652d8a05890cf49c1e2895f3d1fbd7f41 (patch) | |
| tree | 6f0dd3296afb8d4b827ede1217e6dcacd57f0b93 /drivers/net/wireless/rtlwifi/rtl8723be | |
| parent | a3a228e4d6ceb51c54572e4faad7607f997fa342 (diff) | |
| download | linux-e5c3ef3652d8a05890cf49c1e2895f3d1fbd7f41.tar.gz linux-e5c3ef3652d8a05890cf49c1e2895f3d1fbd7f41.tar.bz2 linux-e5c3ef3652d8a05890cf49c1e2895f3d1fbd7f41.zip | |
rtlwifi/rtl8723be: Replace magic number by macro
For consistency with other drivers, replace a magic number by a macro.
Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se>
Reviewed-by: Peter Wu <peter@lekensteyn.nl>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rtlwifi/rtl8723be')
| -rw-r--r-- | drivers/net/wireless/rtlwifi/rtl8723be/hw.c | 2 | ||||
| -rw-r--r-- | drivers/net/wireless/rtlwifi/rtl8723be/reg.h | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/wireless/rtlwifi/rtl8723be/hw.c b/drivers/net/wireless/rtlwifi/rtl8723be/hw.c index 3d555495b453..3cd286930fe0 100644 --- a/drivers/net/wireless/rtlwifi/rtl8723be/hw.c +++ b/drivers/net/wireless/rtlwifi/rtl8723be/hw.c @@ -1197,7 +1197,7 @@ static int _rtl8723be_set_media_status(struct ieee80211_hw *hw, } rtl_write_byte(rtlpriv, (MSR), bt_msr); rtlpriv->cfg->ops->led_control(hw, ledaction); - if ((bt_msr & 0x03) == MSR_AP) + if ((bt_msr & MSR_MASK) == MSR_AP) rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x00); else rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x66); diff --git a/drivers/net/wireless/rtlwifi/rtl8723be/reg.h b/drivers/net/wireless/rtlwifi/rtl8723be/reg.h index 4c653fab8795..3006849ed439 100644 --- a/drivers/net/wireless/rtlwifi/rtl8723be/reg.h +++ b/drivers/net/wireless/rtlwifi/rtl8723be/reg.h @@ -412,6 +412,7 @@ #define MSR_ADHOC 0x01 #define MSR_INFRA 0x02 #define MSR_AP 0x03 +#define MSR_MASK 0x03 #define RRSR_RSC_OFFSET 21 #define RRSR_SHORT_OFFSET 23 |