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authorJon Mason <jdmason@kudzu.us>2011-06-28 18:26:25 -0500
committerJesse Barnes <jbarnes@virtuousgeek.org>2011-07-22 09:06:51 -0700
commitc9b378c7cbf623649e4ca64f955f2afd12ef01b2 (patch)
tree2fde509dd86d2548c5bdb8d00413bda8b513897f /drivers/pci/pci.c
parent0cab0841dc1400f633a7e1ac1e448518692f927a (diff)
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PCI: correct pcie_set_readrq write size
When setting the PCI-E MRRS, pcie_set_readrq queries the current settings via a pci_read_config_word call but writes the modified result via a pci_write_config_dword. This results in writing 16 more bits than were queried. Also, the function description comment is slightly incorrect. Signed-off-by: Jon Mason <jdmason@kudzu.us> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci/pci.c')
-rw-r--r--drivers/pci/pci.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index d549bbc93cdd..08a95b369d85 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3191,7 +3191,7 @@ EXPORT_SYMBOL(pcie_get_readrq);
* @rq: maximum memory read count in bytes
* valid values are 128, 256, 512, 1024, 2048, 4096
*
- * If possible sets maximum read byte count
+ * If possible sets maximum memory read request in bytes
*/
int pcie_set_readrq(struct pci_dev *dev, int rq)
{
@@ -3214,7 +3214,7 @@ int pcie_set_readrq(struct pci_dev *dev, int rq)
if ((ctl & PCI_EXP_DEVCTL_READRQ) != v) {
ctl &= ~PCI_EXP_DEVCTL_READRQ;
ctl |= v;
- err = pci_write_config_dword(dev, cap + PCI_EXP_DEVCTL, ctl);
+ err = pci_write_config_word(dev, cap + PCI_EXP_DEVCTL, ctl);
}
out: