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authorZaid Al-Bassam <zalbassam@google.com>2023-03-17 15:50:22 -0400
committerWill Deacon <will@kernel.org>2023-03-27 14:01:18 +0100
commit711432770f78e5a9ae235a1a55decfb71993c958 (patch)
tree9bf498bedab09e21f74cf6680e231e7a1a980b7b /drivers/perf/arm_pmuv3.c
parentdf29ddf4f04b00cf60669686dc7f534c3ed7c433 (diff)
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perf: pmuv3: Abstract PMU version checks
The current PMU version definitions are available for arm64 only, As we want to add PMUv3 support to arm (32-bit), abstracts these definitions by using arch-specific helpers. Signed-off-by: Zaid Al-Bassam <zalbassam@google.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20230317195027.3746949-4-zalbassam@google.com Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/perf/arm_pmuv3.c')
-rw-r--r--drivers/perf/arm_pmuv3.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c
index f783f068d612..f7d890af8cc1 100644
--- a/drivers/perf/arm_pmuv3.c
+++ b/drivers/perf/arm_pmuv3.c
@@ -392,7 +392,7 @@ static const struct attribute_group armv8_pmuv3_caps_attr_group = {
*/
static bool armv8pmu_has_long_event(struct arm_pmu *cpu_pmu)
{
- return (cpu_pmu->pmuver >= ID_AA64DFR0_EL1_PMUVer_V3P5);
+ return (is_pmuv3p5(cpu_pmu->pmuver));
}
static inline bool armv8pmu_event_has_user_read(struct perf_event *event)
@@ -1084,8 +1084,7 @@ static void __armv8pmu_probe_pmu(void *info)
int pmuver;
pmuver = read_pmuver();
- if (pmuver == ID_AA64DFR0_EL1_PMUVer_IMP_DEF ||
- pmuver == ID_AA64DFR0_EL1_PMUVer_NI)
+ if (!pmuv3_implemented(pmuver))
return;
cpu_pmu->pmuver = pmuver;
@@ -1111,7 +1110,7 @@ static void __armv8pmu_probe_pmu(void *info)
pmceid, ARMV8_PMUV3_MAX_COMMON_EVENTS);
/* store PMMIR register for sysfs */
- if (pmuver >= ID_AA64DFR0_EL1_PMUVer_V3P4 && (pmceid_raw[1] & BIT(31)))
+ if (is_pmuv3p4(pmuver) && (pmceid_raw[1] & BIT(31)))
cpu_pmu->reg_pmmir = read_pmmir();
else
cpu_pmu->reg_pmmir = 0;