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| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2022-03-28 16:52:17 +0200 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2022-04-13 13:19:09 +0530 |
| commit | b7b930f3b3da34543fa20a0172bc4854bac879c3 (patch) | |
| tree | 7711a161a6aebff5e2b81533e75faa4c3084e22f /drivers/phy/mediatek | |
| parent | 09cc358a39d41152236e8f2653a94ab39b35cd3f (diff) | |
| download | linux-b7b930f3b3da34543fa20a0172bc4854bac879c3.tar.gz linux-b7b930f3b3da34543fa20a0172bc4854bac879c3.tar.bz2 linux-b7b930f3b3da34543fa20a0172bc4854bac879c3.zip | |
phy: mediatek: phy-mtk-mipi-dsi: Simplify with dev_err_probe()
Use the dev_err_probe() helper to simplify error handling during probe.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220328145217.228457-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy/mediatek')
| -rw-r--r-- | drivers/phy/mediatek/phy-mtk-mipi-dsi.c | 29 |
1 files changed, 10 insertions, 19 deletions
diff --git a/drivers/phy/mediatek/phy-mtk-mipi-dsi.c b/drivers/phy/mediatek/phy-mtk-mipi-dsi.c index 67b005d5b9e3..28506932bd91 100644 --- a/drivers/phy/mediatek/phy-mtk-mipi-dsi.c +++ b/drivers/phy/mediatek/phy-mtk-mipi-dsi.c @@ -154,11 +154,9 @@ static int mtk_mipi_tx_probe(struct platform_device *pdev) return PTR_ERR(mipi_tx->regs); ref_clk = devm_clk_get(dev, NULL); - if (IS_ERR(ref_clk)) { - ret = PTR_ERR(ref_clk); - dev_err(dev, "Failed to get reference clock: %d\n", ret); - return ret; - } + if (IS_ERR(ref_clk)) + return dev_err_probe(dev, PTR_ERR(ref_clk), + "Failed to get reference clock\n"); ret = of_property_read_u32(dev->of_node, "drive-strength-microamp", &mipi_tx->mipitx_drive); @@ -178,27 +176,20 @@ static int mtk_mipi_tx_probe(struct platform_device *pdev) ret = of_property_read_string(dev->of_node, "clock-output-names", &clk_init.name); - if (ret < 0) { - dev_err(dev, "Failed to read clock-output-names: %d\n", ret); - return ret; - } + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to read clock-output-names\n"); clk_init.ops = mipi_tx->driver_data->mipi_tx_clk_ops; mipi_tx->pll_hw.init = &clk_init; mipi_tx->pll = devm_clk_register(dev, &mipi_tx->pll_hw); - if (IS_ERR(mipi_tx->pll)) { - ret = PTR_ERR(mipi_tx->pll); - dev_err(dev, "Failed to register PLL: %d\n", ret); - return ret; - } + if (IS_ERR(mipi_tx->pll)) + return dev_err_probe(dev, PTR_ERR(mipi_tx->pll), "Failed to register PLL\n"); phy = devm_phy_create(dev, NULL, &mtk_mipi_tx_ops); - if (IS_ERR(phy)) { - ret = PTR_ERR(phy); - dev_err(dev, "Failed to create MIPI D-PHY: %d\n", ret); - return ret; - } + if (IS_ERR(phy)) + return dev_err_probe(dev, PTR_ERR(phy), "Failed to create MIPI D-PHY\n"); + phy_set_drvdata(phy, mipi_tx); phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); |