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authorFelipe Balbi <balbi@ti.com>2015-05-08 11:30:48 -0500
committerKishon Vijay Abraham I <kishon@ti.com>2015-05-11 21:42:26 +0530
commit99db11c6e8a89b236b283df0ec592aecdd00d8ef (patch)
treee129662b7e572acb6842c140c56ce591d41af838 /drivers/phy
parent87006dd600e36e05a2bd978c112a0aa883713c00 (diff)
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phy: miphy28lp: fix sparse warnings
Add missing __iomem annotation to the base address so Sparse doesn't complain. Signed-off-by: Felipe Balbi <balbi@ti.com> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy')
-rw-r--r--drivers/phy/phy-miphy28lp.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/phy/phy-miphy28lp.c b/drivers/phy/phy-miphy28lp.c
index c4cc11dcb2a2..58d5339ff448 100644
--- a/drivers/phy/phy-miphy28lp.c
+++ b/drivers/phy/phy-miphy28lp.c
@@ -367,7 +367,7 @@ static struct miphy28lp_pll_gen pcie_pll_gen[] = {
static inline void miphy28lp_set_reset(struct miphy28lp_phy *miphy_phy)
{
- void *base = miphy_phy->base;
+ void __iomem *base = miphy_phy->base;
u8 val;
/* Putting Macro in reset */
@@ -391,7 +391,7 @@ static inline void miphy28lp_set_reset(struct miphy28lp_phy *miphy_phy)
static inline void miphy28lp_pll_calibration(struct miphy28lp_phy *miphy_phy,
struct pll_ratio *pll_ratio)
{
- void *base = miphy_phy->base;
+ void __iomem *base = miphy_phy->base;
u8 val;
/* Applying PLL Settings */