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authorBarry Song <Baohua.Song@csr.com>2012-09-27 17:56:30 +0800
committerLinus Walleij <linus.walleij@linaro.org>2012-11-11 19:05:58 +0100
commitd3e26f2fe993b5dbc8b4b2275d77f9ad3e08c81a (patch)
treeb61bd706e6fe4e43878e445ef0535e279bf45c18 /drivers/pinctrl/Kconfig
parent06763c741b0a19160482c9b34e5bbc3e50dba79a (diff)
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pinctrl: sirf: enable the driver support new SiRFmarco SoC
The driver supports old up SiRFprimaII SoCs, this patch makes it support the new SiRFmarco as well. SiRFmarco, as a SMP SoC, adds new SIRFSOC_GPIO_PAD_EN_CLR registers, to disable GPIO pad, we should write 1 to the corresponding bit in the new CLEAR register instead of writing 0 to SIRFSOC_GPIO_PAD_EN. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/Kconfig')
-rw-r--r--drivers/pinctrl/Kconfig4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 011133772d2a..5f2f9dc43e3b 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -143,8 +143,8 @@ config PINCTRL_SINGLE
This selects the device tree based generic pinctrl driver.
config PINCTRL_SIRF
- bool "CSR SiRFprimaII pin controller driver"
- depends on ARCH_PRIMA2
+ bool "CSR SiRFprimaII/SiRFmarco pin controller driver"
+ depends on ARCH_SIRF
select PINMUX
config PINCTRL_TEGRA