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| author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2018-02-16 15:25:41 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-02-20 19:03:15 +0100 |
| commit | 12404148598d7b1829b5e36e29facc1c1d07c4bf (patch) | |
| tree | 5e4a05f7a661743e393b3aadd27469394a621535 /drivers/pinctrl/sh-pfc | |
| parent | 5722110e2f8ecf1cf8dac7b0c3c864c5fcf5491f (diff) | |
| download | linux-12404148598d7b1829b5e36e29facc1c1d07c4bf.tar.gz linux-12404148598d7b1829b5e36e29facc1c1d07c4bf.tar.bz2 linux-12404148598d7b1829b5e36e29facc1c1d07c4bf.zip | |
pinctrl: sh-pfc: r8a7795-es1: Add HDMI pins, groups and functions
This patch adds HDMI0 CEC pin, group and function to
the R8A7795 ES1.x SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[uli: fixed typo in comment]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl/sh-pfc')
| -rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | 30 |
1 files changed, 29 insertions, 1 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c index 292e35d4d2f4..81bfcafdcd8a 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c @@ -1,7 +1,7 @@ /* * R8A7795 ES1.x processor support - PFC hardware block. * - * Copyright (C) 2015 Renesas Electronics Corporation + * Copyright (C) 2015-2017 Renesas Electronics Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -2067,6 +2067,22 @@ static const unsigned int du_disp_pins[] = { static const unsigned int du_disp_mux[] = { DU_DISP_MARK, }; +/* - HDMI ------------------------------------------------------------------- */ +static const unsigned int hdmi0_cec_pins[] = { + /* HDMI0_CEC */ + RCAR_GP_PIN(7, 2), +}; +static const unsigned int hdmi0_cec_mux[] = { + HDMI0_CEC_MARK, +}; +static const unsigned int hdmi1_cec_pins[] = { + /* HDMI1_CEC */ + RCAR_GP_PIN(7, 3), +}; +static const unsigned int hdmi1_cec_mux[] = { + HDMI1_CEC_MARK, +}; + /* - HSCIF0 ----------------------------------------------------------------- */ static const unsigned int hscif0_data_pins[] = { /* RX, TX */ @@ -3865,6 +3881,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(du_oddf), SH_PFC_PIN_GROUP(du_cde), SH_PFC_PIN_GROUP(du_disp), + SH_PFC_PIN_GROUP(hdmi0_cec), + SH_PFC_PIN_GROUP(hdmi1_cec), SH_PFC_PIN_GROUP(hscif0_data), SH_PFC_PIN_GROUP(hscif0_clk), SH_PFC_PIN_GROUP(hscif0_ctrl), @@ -4210,6 +4228,14 @@ static const char * const du_groups[] = { "du_disp", }; +static const char * const hdmi0_groups[] = { + "hdmi0_cec", +}; + +static const char * const hdmi1_groups[] = { + "hdmi1_cec", +}; + static const char * const hscif0_groups[] = { "hscif0_data", "hscif0_clk", @@ -4578,6 +4604,8 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(drif2), SH_PFC_FUNCTION(drif3), SH_PFC_FUNCTION(du), + SH_PFC_FUNCTION(hdmi0), + SH_PFC_FUNCTION(hdmi1), SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), SH_PFC_FUNCTION(hscif2), |