diff options
| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2017-05-16 17:46:48 +0200 |
|---|---|---|
| committer | Benson Leung <bleung@chromium.org> | 2017-06-23 16:12:01 -0700 |
| commit | 8d4a3dc423a2695be51ac864eefb8ba7688b1240 (patch) | |
| tree | 5a8861e1cec25fcaf756822f0e035200a0e1cab1 /drivers/platform/chrome/cros_ec_lpc_reg.c | |
| parent | bce70fef7279243d62adbf5f53998b8d3d016144 (diff) | |
| download | linux-8d4a3dc423a2695be51ac864eefb8ba7688b1240.tar.gz linux-8d4a3dc423a2695be51ac864eefb8ba7688b1240.tar.bz2 linux-8d4a3dc423a2695be51ac864eefb8ba7688b1240.zip | |
platform/chrome: cros_ec_lpc: Add support for mec1322 EC
This adds support for the ChromeOS LPC Microchip Embedded Controller
(mec1322) variant.
mec1322 accesses I/O region [800h, 9ffh] through embedded memory
interface (EMI) rather than LPC.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Benson Leung <bleung@chromium.org>
Diffstat (limited to 'drivers/platform/chrome/cros_ec_lpc_reg.c')
| -rw-r--r-- | drivers/platform/chrome/cros_ec_lpc_reg.c | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/drivers/platform/chrome/cros_ec_lpc_reg.c b/drivers/platform/chrome/cros_ec_lpc_reg.c index 03c97813171e..dcc7a3e30604 100644 --- a/drivers/platform/chrome/cros_ec_lpc_reg.c +++ b/drivers/platform/chrome/cros_ec_lpc_reg.c @@ -24,6 +24,7 @@ #include <linux/io.h> #include <linux/mfd/cros_ec.h> #include <linux/mfd/cros_ec_commands.h> +#include <linux/mfd/cros_ec_lpc_mec.h> static u8 lpc_read_bytes(unsigned int offset, unsigned int length, u8 *dest) { @@ -53,12 +54,80 @@ static u8 lpc_write_bytes(unsigned int offset, unsigned int length, u8 *msg) return sum; } +#ifdef CONFIG_CROS_EC_LPC_MEC + u8 cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length, u8 *dest) { + if (length == 0) + return 0; + + /* Access desired range through EMI interface */ + if (offset >= MEC_EMI_RANGE_START && offset <= MEC_EMI_RANGE_END) { + /* Ensure we don't straddle EMI region */ + if (WARN_ON(offset + length - 1 > MEC_EMI_RANGE_END)) + return 0; + + return cros_ec_lpc_io_bytes_mec(MEC_IO_READ, offset, length, + dest); + } + + if (WARN_ON(offset + length > MEC_EMI_RANGE_START && + offset < MEC_EMI_RANGE_START)) + return 0; + return lpc_read_bytes(offset, length, dest); } u8 cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length, u8 *msg) { + if (length == 0) + return 0; + + /* Access desired range through EMI interface */ + if (offset >= MEC_EMI_RANGE_START && offset <= MEC_EMI_RANGE_END) { + /* Ensure we don't straddle EMI region */ + if (WARN_ON(offset + length - 1 > MEC_EMI_RANGE_END)) + return 0; + + return cros_ec_lpc_io_bytes_mec(MEC_IO_WRITE, offset, length, + msg); + } + + if (WARN_ON(offset + length > MEC_EMI_RANGE_START && + offset < MEC_EMI_RANGE_START)) + return 0; + return lpc_write_bytes(offset, length, msg); } + +void cros_ec_lpc_reg_init(void) +{ + cros_ec_lpc_mec_init(); +} + +void cros_ec_lpc_reg_destroy(void) +{ + cros_ec_lpc_mec_destroy(); +} + +#else /* CONFIG_CROS_EC_LPC_MEC */ + +u8 cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length, u8 *dest) +{ + return lpc_read_bytes(offset, length, dest); +} + +u8 cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length, u8 *msg) +{ + return lpc_write_bytes(offset, length, msg); +} + +void cros_ec_lpc_reg_init(void) +{ +} + +void cros_ec_lpc_reg_destroy(void) +{ +} + +#endif /* CONFIG_CROS_EC_LPC_MEC */ |