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| author | Lee Jones <lee.jones@linaro.org> | 2021-03-12 11:09:09 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-03-12 17:09:34 -0800 |
| commit | 9ec04c71ab206dbc95c79abdfc647df965a2cb91 (patch) | |
| tree | 890c597b0d174dcd06dbfcf124a9af7f34fe1d07 /drivers/ptp | |
| parent | f90fc37f289cd0886ef3a12b2ea33b93b8d9d360 (diff) | |
| download | linux-9ec04c71ab206dbc95c79abdfc647df965a2cb91.tar.gz linux-9ec04c71ab206dbc95c79abdfc647df965a2cb91.tar.bz2 linux-9ec04c71ab206dbc95c79abdfc647df965a2cb91.zip | |
ptp: ptp_clockmatrix: Demote non-kernel-doc header to standard comment
Fixes the following W=1 kernel build warning(s):
drivers/ptp/ptp_clockmatrix.c:1408: warning: Cannot understand * @brief Maximum absolute value for write phase offset in picoseconds
drivers/ptp/ptp_clockmatrix.c:1408: warning: Cannot understand * @brief Maximum absolute value for write phase offset in picoseconds
drivers/ptp/ptp_clockmatrix.c:1408: warning: Cannot understand * @brief Maximum absolute value for write phase offset in picoseconds
drivers/ptp/ptp_clockmatrix.c:1408: warning: Cannot understand * @brief Maximum absolute value for write phase offset in picoseconds
drivers/ptp/ptp_clockmatrix.c:1408: warning: Cannot understand * @brief Maximum absolute value for write phase offset in picoseconds
Cc: Richard Cochran <richardcochran@gmail.com>
Cc: IDT-support-1588@lm.renesas.com
Cc: netdev@vger.kernel.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/ptp')
| -rw-r--r-- | drivers/ptp/ptp_clockmatrix.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/ptp/ptp_clockmatrix.c b/drivers/ptp/ptp_clockmatrix.c index 75463c2e2b86..fa636951169e 100644 --- a/drivers/ptp/ptp_clockmatrix.c +++ b/drivers/ptp/ptp_clockmatrix.c @@ -1404,8 +1404,8 @@ static int idtcm_set_pll_mode(struct idtcm_channel *channel, /* PTP Hardware Clock interface */ -/** - * @brief Maximum absolute value for write phase offset in picoseconds +/* + * Maximum absolute value for write phase offset in picoseconds * * Destination signed register is 32-bit register in resolution of 50ps * |