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| author | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2019-03-20 13:32:30 +0100 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2019-04-04 10:07:08 +0200 |
| commit | db7853414b3eb8fbd16017edd3d60e6f717170ff (patch) | |
| tree | 36f40c7e2578b9ba5c5080c2d8683504e4a9e507 /drivers/rtc | |
| parent | 3a205b9dc87de108e096ac128e49feda9e3e58a8 (diff) | |
| download | linux-db7853414b3eb8fbd16017edd3d60e6f717170ff.tar.gz linux-db7853414b3eb8fbd16017edd3d60e6f717170ff.tar.bz2 linux-db7853414b3eb8fbd16017edd3d60e6f717170ff.zip | |
rtc: xgene: correct checkpatch issues
Correct trivial whitespace issues. Also sort the headers.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'drivers/rtc')
| -rw-r--r-- | drivers/rtc/rtc-xgene.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/rtc/rtc-xgene.c b/drivers/rtc/rtc-xgene.c index ba9121d02f02..eb745deda936 100644 --- a/drivers/rtc/rtc-xgene.c +++ b/drivers/rtc/rtc-xgene.c @@ -7,15 +7,15 @@ * Loc Ho <lho@apm.com> */ +#include <linux/clk.h> +#include <linux/delay.h> #include <linux/init.h> +#include <linux/io.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/slab.h> -#include <linux/clk.h> -#include <linux/delay.h> #include <linux/rtc.h> +#include <linux/slab.h> /* RTC CSR Registers */ #define RTC_CCVR 0x00 @@ -58,7 +58,7 @@ static int xgene_rtc_set_mmss(struct device *dev, unsigned long secs) * NOTE: After the following write, the RTC_CCVR is only reflected * after the update cycle of 1 seconds. */ - writel((u32) secs, pdata->csr_base + RTC_CLR); + writel((u32)secs, pdata->csr_base + RTC_CLR); readl(pdata->csr_base + RTC_CLR); /* Force a barrier */ return 0; @@ -106,7 +106,7 @@ static int xgene_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) rtc_tm_to_time(&alrm->time, &alarm_time); pdata->alarm_time = alarm_time; - writel((u32) pdata->alarm_time, pdata->csr_base + RTC_CMR); + writel((u32)pdata->alarm_time, pdata->csr_base + RTC_CMR); xgene_rtc_alarm_irq_enable(dev, alrm->enabled); @@ -123,7 +123,7 @@ static const struct rtc_class_ops xgene_rtc_ops = { static irqreturn_t xgene_rtc_interrupt(int irq, void *id) { - struct xgene_rtc_dev *pdata = (struct xgene_rtc_dev *) id; + struct xgene_rtc_dev *pdata = id; /* Check if interrupt asserted */ if (!(readl(pdata->csr_base + RTC_STAT) & RTC_STAT_BIT)) |