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authorDavid S. Miller <davem@sunset.davemloft.net>2007-09-30 17:10:42 -0700
committerJames Bottomley <James.Bottomley@HansenPartnership.com>2008-07-12 08:22:30 -0500
commita793804f25fb2c0fe2b784450092699ea3475332 (patch)
treedac36e68129d2d903cba1353f74d3aa9a38fce59 /drivers/scsi/esp_scsi.c
parenteac6e8e449647cbb9efee53977c8bfee0aa7d69e (diff)
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[SCSI] esp: Correct chip ID probing sequence.
The features enable bit has to be set in the config2 register before we can be absolutely sure we will probe a correct part unique ID and family code from the transfer-count-high register. Also, reload the CFACT, STP, SOFF, and TIMEO near the end of esp_reset_esp(). From a patch by Maciej W. Rozycki. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi/esp_scsi.c')
-rw-r--r--drivers/scsi/esp_scsi.c24
1 files changed, 13 insertions, 11 deletions
diff --git a/drivers/scsi/esp_scsi.c b/drivers/scsi/esp_scsi.c
index a0b6d414953d..3d5ad243e77f 100644
--- a/drivers/scsi/esp_scsi.c
+++ b/drivers/scsi/esp_scsi.c
@@ -219,19 +219,10 @@ static void esp_reset_esp(struct esp *esp)
/* Now reset the ESP chip */
scsi_esp_cmd(esp, ESP_CMD_RC);
scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
+ if (esp->rev == FAST)
+ esp_write8(ESP_CONFIG2_FENAB, ESP_CFG2);
scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
- /* Reload the configuration registers */
- esp_write8(esp->cfact, ESP_CFACT);
-
- esp->prev_stp = 0;
- esp_write8(esp->prev_stp, ESP_STP);
-
- esp->prev_soff = 0;
- esp_write8(esp->prev_soff, ESP_SOFF);
-
- esp_write8(esp->neg_defp, ESP_TIMEO);
-
/* This is the only point at which it is reliable to read
* the ID-code for a fast ESP chip variants.
*/
@@ -316,6 +307,17 @@ static void esp_reset_esp(struct esp *esp)
break;
}
+ /* Reload the configuration registers */
+ esp_write8(esp->cfact, ESP_CFACT);
+
+ esp->prev_stp = 0;
+ esp_write8(esp->prev_stp, ESP_STP);
+
+ esp->prev_soff = 0;
+ esp_write8(esp->prev_soff, ESP_SOFF);
+
+ esp_write8(esp->neg_defp, ESP_TIMEO);
+
/* Eat any bitrot in the chip */
esp_read8(ESP_INTRPT);
udelay(100);