diff options
| author | Finn Thain <fthain@telegraphics.com.au> | 2008-04-25 10:06:05 -0500 |
|---|---|---|
| committer | James Bottomley <James.Bottomley@HansenPartnership.com> | 2008-04-27 12:19:57 -0500 |
| commit | 6fe07aaffbf086a0ce9134ef27ce4a8921ff5947 (patch) | |
| tree | 3df572890c012b0a23662141fc4e538a36b66b10 /drivers/scsi/esp_scsi.h | |
| parent | 6d9d63b9480e1c7ea41845646de803c2d3f0eae2 (diff) | |
| download | linux-6fe07aaffbf086a0ce9134ef27ce4a8921ff5947.tar.gz linux-6fe07aaffbf086a0ce9134ef27ce4a8921ff5947.tar.bz2 linux-6fe07aaffbf086a0ce9134ef27ce4a8921ff5947.zip | |
[SCSI] m68k: new mac_esp scsi driver
Replace the mac_esp driver with a new one based on the esp_scsi core.
For esp_scsi: add support for sync transfers for the PIO mode, add a new
esp_driver_ops method to get the maximum dma transfer size (like the old
NCR53C9x driver), and some cleanups.
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi/esp_scsi.h')
| -rw-r--r-- | drivers/scsi/esp_scsi.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/scsi/esp_scsi.h b/drivers/scsi/esp_scsi.h index 9367a88d3974..bb43a1388188 100644 --- a/drivers/scsi/esp_scsi.h +++ b/drivers/scsi/esp_scsi.h @@ -224,7 +224,7 @@ #define ESP_TIMEO_CONST 8192 #define ESP_NEG_DEFP(mhz, cfact) \ ((ESP_BUS_TIMEOUT * ((mhz) / 1000)) / (8192 * (cfact))) -#define ESP_MHZ_TO_CYCLE(mhertz) ((1000000000) / ((mhertz) / 1000)) +#define ESP_HZ_TO_CYCLE(hertz) ((1000000000) / ((hertz) / 1000)) #define ESP_TICK(ccf, cycle) ((7682 * (ccf) * (cycle) / 1000)) /* For slow to medium speed input clock rates we shoot for 5mb/s, but for high @@ -368,6 +368,12 @@ struct esp_driver_ops { */ int (*irq_pending)(struct esp *esp); + /* Return the maximum allowable size of a DMA transfer for a + * given buffer. + */ + u32 (*dma_length_limit)(struct esp *esp, u32 dma_addr, + u32 dma_len); + /* Reset the DMA engine entirely. On return, ESP interrupts * should be enabled. Often the interrupt enabling is * controlled in the DMA engine. @@ -471,6 +477,7 @@ struct esp { #define ESP_FLAG_DOING_SLOWCMD 0x00000004 #define ESP_FLAG_WIDE_CAPABLE 0x00000008 #define ESP_FLAG_QUICKIRQ_CHECK 0x00000010 +#define ESP_FLAG_DISABLE_SYNC 0x00000020 u8 select_state; #define ESP_SELECT_NONE 0x00 /* Not selecting */ |