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| author | Ondrej Zary <linux@rainbow-software.org> | 2016-01-03 16:06:17 +1100 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2016-01-06 21:43:12 -0500 |
| commit | aeb51152bb55451f7a3ddb8c1ec4d4bc19d4a195 (patch) | |
| tree | 0f0ab14b9416e7f3cbfd669406abc92398f38bd1 /drivers/scsi/g_NCR5380.h | |
| parent | cecf3beef0ef311b5b375b6307fd5dc3f5dc3edb (diff) | |
| download | linux-aeb51152bb55451f7a3ddb8c1ec4d4bc19d4a195.tar.gz linux-aeb51152bb55451f7a3ddb8c1ec4d4bc19d4a195.tar.bz2 linux-aeb51152bb55451f7a3ddb8c1ec4d4bc19d4a195.zip | |
ncr5380: Enable PDMA for DTC chips
Add I/O register mapping for DTC chips and enable PDMA mode.
These chips have 16-bit wide HOST BUFFER register and it must be read
by 16-bit accesses (we lose data otherwise).
Large PIO transfers crash at least the DTCT-436P chip (all reads result
in 0xFF) so this patch actually makes it work.
The chip also crashes when we bang on the C400 host status register too
heavily after PDMA write - a small udelay is needed.
Tested on DTCT-436P and verified that it does not break 53C400A.
Signed-off-by: Ondrej Zary <linux@rainbow-software.org>
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'drivers/scsi/g_NCR5380.h')
| -rw-r--r-- | drivers/scsi/g_NCR5380.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/scsi/g_NCR5380.h b/drivers/scsi/g_NCR5380.h index c5e57b7588c1..5ab64d96b576 100644 --- a/drivers/scsi/g_NCR5380.h +++ b/drivers/scsi/g_NCR5380.h @@ -44,7 +44,8 @@ #define NCR5380_implementation_fields \ int c400_ctl_status; \ int c400_blk_cnt; \ - int c400_host_buf; + int c400_host_buf; \ + int io_width; #else /* therefore SCSI_G_NCR5380_MEM */ |