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author | Bard Liao <yung-chuan.liao@linux.intel.com> | 2021-07-23 19:54:51 +0800 |
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committer | Mark Brown <broonie@kernel.org> | 2021-08-02 15:45:42 +0100 |
commit | 60e9feb781dfe84158b4ec7a4d61c5103e96e6f3 (patch) | |
tree | ae8c25188f8efccd7673a3298d576ea75d8dc977 /drivers/soundwire | |
parent | 198fa4bcf6a1e8685b43e37790d45f3ebcbc2784 (diff) | |
download | linux-60e9feb781dfe84158b4ec7a4d61c5103e96e6f3.tar.gz linux-60e9feb781dfe84158b4ec7a4d61c5103e96e6f3.tar.bz2 linux-60e9feb781dfe84158b4ec7a4d61c5103e96e6f3.zip |
soundwire: intel: introduce shim and alh base
shim base and alh base are platform-dependent. Adding these two
parameters allows us to use different shim/alh base for each
platform.
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Acked-By: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210723115451.7245-7-yung-chuan.liao@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/soundwire')
-rw-r--r-- | drivers/soundwire/intel_init.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/soundwire/intel_init.c b/drivers/soundwire/intel_init.c index 03ff69ab1797..e329022e1669 100644 --- a/drivers/soundwire/intel_init.c +++ b/drivers/soundwire/intel_init.c @@ -63,8 +63,8 @@ static struct sdw_intel_link_dev *intel_link_dev_register(struct sdw_intel_res * link->mmio_base = res->mmio_base; link->registers = res->mmio_base + SDW_LINK_BASE + (SDW_LINK_SIZE * link_id); - link->shim = res->mmio_base + SDW_SHIM_BASE; - link->alh = res->mmio_base + SDW_ALH_BASE; + link->shim = res->mmio_base + res->shim_base; + link->alh = res->mmio_base + res->alh_base; link->ops = res->ops; link->dev = res->dev; @@ -214,6 +214,8 @@ static struct sdw_intel_ctx } ctx->mmio_base = res->mmio_base; + ctx->shim_base = res->shim_base; + ctx->alh_base = res->alh_base; ctx->link_mask = res->link_mask; ctx->handle = res->handle; mutex_init(&ctx->shim_lock); @@ -302,7 +304,7 @@ sdw_intel_startup_controller(struct sdw_intel_ctx *ctx) return -EINVAL; /* Check SNDWLCAP.LCOUNT */ - caps = ioread32(ctx->mmio_base + SDW_SHIM_BASE + SDW_SHIM_LCAP); + caps = ioread32(ctx->mmio_base + ctx->shim_base + SDW_SHIM_LCAP); caps &= GENMASK(2, 0); /* Check HW supported vs property value */ |