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authorMika Westerberg <mika.westerberg@linux.intel.com>2022-08-16 15:55:37 +0300
committerMark Brown <broonie@kernel.org>2022-08-22 14:07:30 +0100
commit1d895be13af0d962bef67ba0ceaefbdc6954fe67 (patch)
treea1ac71239cac7378cd8ed1f7af7ca0bb8f49ad74 /drivers/spi/spi-intel.c
parent3f03c618bebb024bf8770a74480a9416c847ce53 (diff)
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spi: intel: 64k erase is supported from Canon Lake and beyond
The hardware sequencer in Intel Canon Lake and beyond supports also 64k erase command. The SPI-NOR core uses SFDP (Serial Flash Discovery Parameter) to figure out what the chip actually supports and only issues 64k erase if it is supported. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20220816125537.89389-1-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-intel.c')
-rw-r--r--drivers/spi/spi-intel.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/spi-intel.c b/drivers/spi/spi-intel.c
index 52d43324bb87..55f4ee2db002 100644
--- a/drivers/spi/spi-intel.c
+++ b/drivers/spi/spi-intel.c
@@ -1100,6 +1100,7 @@ static int intel_spi_init(struct intel_spi *ispi)
ispi->pregs = ispi->base + CNL_PR;
ispi->nregions = CNL_FREG_NUM;
ispi->pr_num = CNL_PR_NUM;
+ erase_64k = true;
break;
default: