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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-01-02 14:38:22 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2020-01-07 22:34:07 +0000 |
| commit | 144d8f9781e60d89dfd614210d2cedbefbba8885 (patch) | |
| tree | a75c448e6588c7edeafc30a7fb81d286f8119444 /drivers/spi/spi-rspi.c | |
| parent | 9815ed8714d26560d09b41f906b96a97f9bc3e3f (diff) | |
| download | linux-144d8f9781e60d89dfd614210d2cedbefbba8885.tar.gz linux-144d8f9781e60d89dfd614210d2cedbefbba8885.tar.bz2 linux-144d8f9781e60d89dfd614210d2cedbefbba8885.zip | |
spi: rspi: Add support for GPIO chip selects
Add support for GPIO chip selects using GPIO descriptors. As the RSPI
controller always drives a native chip select when performing a
transfer, at least one native chip select must be left unused.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200102133822.29346-7-geert+renesas@glider.be
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-rspi.c')
| -rw-r--r-- | drivers/spi/spi-rspi.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c index 2f5a856a9319..85575d45901c 100644 --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c @@ -242,6 +242,7 @@ struct spi_ops { u16 mode_bits; u16 flags; u16 fifo_size; + u8 num_hw_ss; }; /* @@ -934,7 +935,8 @@ static int rspi_prepare_message(struct spi_controller *ctlr, rspi->spcmd |= SPCMD_CPHA; /* Configure slave signal to assert */ - rspi->spcmd |= SPCMD_SSLA(spi->chip_select); + rspi->spcmd |= SPCMD_SSLA(spi->cs_gpiod ? rspi->ctlr->unused_native_cs + : spi->chip_select); /* CMOS output mode and MOSI signal from previous transfer */ rspi->sppcr = 0; @@ -1123,6 +1125,7 @@ static const struct spi_ops rspi_ops = { .mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP, .flags = SPI_CONTROLLER_MUST_TX, .fifo_size = 8, + .num_hw_ss = 2, }; static const struct spi_ops rspi_rz_ops = { @@ -1131,6 +1134,7 @@ static const struct spi_ops rspi_rz_ops = { .mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP, .flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX, .fifo_size = 8, /* 8 for TX, 32 for RX */ + .num_hw_ss = 1, }; static const struct spi_ops qspi_ops = { @@ -1141,6 +1145,7 @@ static const struct spi_ops qspi_ops = { SPI_RX_DUAL | SPI_RX_QUAD, .flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX, .fifo_size = 32, + .num_hw_ss = 1, }; #ifdef CONFIG_OF @@ -1256,6 +1261,8 @@ static int rspi_probe(struct platform_device *pdev) ctlr->mode_bits = ops->mode_bits; ctlr->flags = ops->flags; ctlr->dev.of_node = pdev->dev.of_node; + ctlr->use_gpio_descriptors = true; + ctlr->max_native_cs = rspi->ops->num_hw_ss; ret = platform_get_irq_byname_optional(pdev, "rx"); if (ret < 0) { |