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| author | David Brownell <david-b@pacbell.net> | 2007-07-17 04:04:02 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-17 10:23:04 -0700 |
| commit | dccd573bb02aa011a4a7146c02c409ac0bd722a0 (patch) | |
| tree | 743eeca4fbbea8272ca4f341b806d776e404d704 /drivers/spi/spi_imx.c | |
| parent | ff294cba8a62fa8334b88692da6d48683900f015 (diff) | |
| download | linux-dccd573bb02aa011a4a7146c02c409ac0bd722a0.tar.gz linux-dccd573bb02aa011a4a7146c02c409ac0bd722a0.tar.bz2 linux-dccd573bb02aa011a4a7146c02c409ac0bd722a0.zip | |
SPI controller drivers: check for unsupported modes
Minor SPI controller driver updates: make the setup() methods reject
spi->mode bits they don't support, by masking aginst the inverse of bits
they *do* support. This insures against misbehavior later when new mode
bits get added.
Most controllers can't support SPI_LSB_FIRST; more handle SPI_CS_HIGH.
Support for all four SPI clock/transfer modes is routine.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/spi/spi_imx.c')
| -rw-r--r-- | drivers/spi/spi_imx.c | 24 |
1 files changed, 9 insertions, 15 deletions
diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c index 656be4a5094a..aee9ad6f633c 100644 --- a/drivers/spi/spi_imx.c +++ b/drivers/spi/spi_imx.c @@ -1163,6 +1163,9 @@ msg_rejected: return -EINVAL; } +/* the spi->mode bits understood by this driver: */ +#define MODEBITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH) + /* On first setup bad values must free chip_data memory since will cause spi_new_device to fail. Bad value setup from protocol driver are simply not applied and notified to the calling driver. */ @@ -1174,6 +1177,12 @@ static int setup(struct spi_device *spi) u32 tmp; int status = 0; + if (spi->mode & ~MODEBITS) { + dev_dbg(&spi->dev, "setup: unsupported mode bits %x\n", + spi->mode & ~MODEBITS); + return -EINVAL; + } + /* Get controller data */ chip_info = spi->controller_data; @@ -1245,21 +1254,6 @@ static int setup(struct spi_device *spi) /* SPI mode */ tmp = spi->mode; - if (tmp & SPI_LSB_FIRST) { - status = -EINVAL; - if (first_setup) { - dev_err(&spi->dev, - "setup - " - "HW doesn't support LSB first transfer\n"); - goto err_first_setup; - } else { - dev_err(&spi->dev, - "setup - " - "HW doesn't support LSB first transfer, " - "default to MSB first\n"); - spi->mode &= ~SPI_LSB_FIRST; - } - } if (tmp & SPI_CS_HIGH) { u32_EDIT(chip->control, SPI_CONTROL_SSPOL, SPI_CONTROL_SSPOL_ACT_HIGH); |