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authorAndi Shyti <andi.shyti@samsung.com>2016-06-28 11:41:12 +0900
committerMark Brown <broonie@kernel.org>2016-06-29 22:45:23 +0100
commita92e7c3d82a1313ab1954e5cdfd8f04efdb4ca78 (patch)
treeef099f7f2fdb25db02300b670414a5d94a29e91b /drivers/spi
parentaa4964c4eb3ed38666023bcb805403cb7cf2af63 (diff)
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spi: s3c64xx: consider the case when the CS line is not connected
When the CS line is not connected, it is not needed to enable or disable the chip selection functionality from the s3c64xx devices in order to perform a transfer. Set the CS controller logically always enabled already during initialization (by writing '0' in the S3C64XX_SPI_SLAVE_SEL register) and never disable it. Signed-off-by: Andi Shyti <andi.shyti@samsung.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-s3c64xx.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 972367d5c7f2..14269b07804c 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -315,6 +315,9 @@ static void s3c64xx_spi_set_cs(struct spi_device *spi, bool enable)
struct s3c64xx_spi_driver_data *sdd =
spi_master_get_devdata(spi->master);
+ if (sdd->cntrlr_info->no_cs)
+ return;
+
if (enable) {
if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO)) {
writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL);
@@ -960,7 +963,9 @@ static void s3c64xx_spi_hwinit(struct s3c64xx_spi_driver_data *sdd, int channel)
sdd->cur_speed = 0;
- if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO))
+ if (sci->no_cs)
+ writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL);
+ else if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO))
writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL);
/* Disable Interrupts - we use Polling if not DMA mode */
@@ -1015,6 +1020,8 @@ static struct s3c64xx_spi_info *s3c64xx_spi_parse_dt(struct device *dev)
sci->num_cs = temp;
}
+ sci->no_cs = of_property_read_bool(dev->of_node, "broken-cs");
+
return sci;
}
#else