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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2021-07-19 10:48:40 +0300
committerMark Brown <broonie@kernel.org>2021-07-19 12:58:52 +0100
commite0a6512d29126901dd16dfede314616b57ec8210 (patch)
tree3b42168d94f4ee68223c69971f89adad68d9c9a1 /drivers/spi
parent57f1c12e455fc6c4c0db2c9f14e57b95822c2321 (diff)
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spi: pxa2xx: Convert reset_sccr1() to use pxa2xx_spi_update()
Convert reset_sccr1() to use pxa2xx_spi_update(). It will help for further improvements. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210719074842.36060-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-pxa2xx.c16
1 files changed, 7 insertions, 9 deletions
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index 974e30744b83..7c4c8179a329 100644
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi-pxa2xx.c
@@ -594,24 +594,22 @@ static int u32_reader(struct driver_data *drv_data)
static void reset_sccr1(struct driver_data *drv_data)
{
- struct chip_data *chip =
- spi_get_ctldata(drv_data->controller->cur_msg->spi);
- u32 sccr1_reg;
+ struct chip_data *chip = spi_get_ctldata(drv_data->controller->cur_msg->spi);
+ u32 mask = drv_data->int_cr1;
- sccr1_reg = pxa2xx_spi_read(drv_data, SSCR1) & ~drv_data->int_cr1;
switch (drv_data->ssp_type) {
case QUARK_X1000_SSP:
- sccr1_reg &= ~QUARK_X1000_SSCR1_RFT;
+ mask |= QUARK_X1000_SSCR1_RFT;
break;
case CE4100_SSP:
- sccr1_reg &= ~CE4100_SSCR1_RFT;
+ mask |= CE4100_SSCR1_RFT;
break;
default:
- sccr1_reg &= ~SSCR1_RFT;
+ mask |= SSCR1_RFT;
break;
}
- sccr1_reg |= chip->threshold;
- pxa2xx_spi_write(drv_data, SSCR1, sccr1_reg);
+
+ pxa2xx_spi_update(drv_data, SSCR1, mask, chip->threshold);
}
static void int_stop_and_reset(struct driver_data *drv_data)