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| author | Doug Anderson <dianders@chromium.org> | 2014-08-28 16:43:48 -0700 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2014-08-29 12:07:38 +0100 |
| commit | 5d1d150d7d775db1dccb4dc4676075d456dea392 (patch) | |
| tree | 97b66a4e7603fcf679b1b2a54a7b63de61b3f793 /drivers/spi | |
| parent | 0ac7a4904ae1a73ae4c2c18ff6a5dd2b7e03254c (diff) | |
| download | linux-5d1d150d7d775db1dccb4dc4676075d456dea392.tar.gz linux-5d1d150d7d775db1dccb4dc4676075d456dea392.tar.bz2 linux-5d1d150d7d775db1dccb4dc4676075d456dea392.zip | |
spi/rockchip: Avoid accidentally turning off the clock
If our client is requesting a clock that is above the maximum clock
then the following division will result in 0:
rs->max_freq / rs->speed
We'll then program 0 into the SPI_BAUDR register. The Rockchip TRM
says: "If the value is 0, the serial output clock (sclk_out) is
disabled."
It's much better to end up with the fastest possible clock rather than
a clock that is off, so enforce a minimum value.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/spi-rockchip.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 6321326eb751..cd0e08b0c9f6 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -499,7 +499,7 @@ static void rockchip_spi_config(struct rockchip_spi *rs) } /* div doesn't support odd number */ - div = rs->max_freq / rs->speed; + div = max_t(u32, rs->max_freq / rs->speed, 1); div = (div + 1) & 0xfffe; spi_enable_chip(rs, 0); |