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authorNeil Armstrong <narmstrong@baylibre.com>2020-03-12 14:31:27 +0100
committerMark Brown <broonie@kernel.org>2020-03-12 17:22:53 +0000
commit8791068dab979819e01f41736953b9b2e462867b (patch)
treec91544c79cffccd1dcf2141e2d94f71c64536dfa /drivers/spi
parent3196816ff64bb3a21fbda89e7355b6b87c3f50a0 (diff)
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spi: meson-spicc: add min sclk for each compatible
The G12A SPICC controller variant takes the source clock from a specific clock instead of the bus clock. The minimal clock calculus won't work with the G12A support, thus add the minimal supported clock for each variant and pass this to the SPI core. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20200312133131.26430-6-narmstrong@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-meson-spicc.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/spi/spi-meson-spicc.c b/drivers/spi/spi-meson-spicc.c
index 710b4e780daa..b5bd3a897e8f 100644
--- a/drivers/spi/spi-meson-spicc.c
+++ b/drivers/spi/spi-meson-spicc.c
@@ -132,6 +132,7 @@
struct meson_spicc_data {
unsigned int max_speed_hz;
+ unsigned int min_speed_hz;
bool has_oen;
bool has_enhance_clk_div;
};
@@ -685,7 +686,7 @@ static int meson_spicc_probe(struct platform_device *pdev)
SPI_BPW_MASK(16) |
SPI_BPW_MASK(8);
master->flags = (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX);
- master->min_speed_hz = rate >> 9;
+ master->min_speed_hz = spicc->data->min_speed_hz;
master->setup = meson_spicc_setup;
master->cleanup = meson_spicc_cleanup;
master->prepare_message = meson_spicc_prepare_message;
@@ -736,10 +737,12 @@ static int meson_spicc_remove(struct platform_device *pdev)
static const struct meson_spicc_data meson_spicc_gx_data = {
.max_speed_hz = 30000000,
+ .min_speed_hz = 325000,
};
static const struct meson_spicc_data meson_spicc_axg_data = {
.max_speed_hz = 80000000,
+ .min_speed_hz = 325000,
.has_oen = true,
.has_enhance_clk_div = true,
};