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| author | Stephen Boyd <sboyd@codeaurora.org> | 2014-10-29 18:47:01 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-11-06 14:57:22 -0800 |
| commit | a12f1b406f2d3c3e3bba5300b6e420d004ca263b (patch) | |
| tree | f6bea254afb234f136578cacfdbae9e37970ccbd /drivers/tty/serial/msm_serial.c | |
| parent | 0896d4d4fb162297d7199410bae386a96a2e473b (diff) | |
| download | linux-a12f1b406f2d3c3e3bba5300b6e420d004ca263b.tar.gz linux-a12f1b406f2d3c3e3bba5300b6e420d004ca263b.tar.bz2 linux-a12f1b406f2d3c3e3bba5300b6e420d004ca263b.zip | |
tty: serial: msm: Reset uartdm after baud rate change
We need to issue a reset if we ever change the value of the IPR
register on DM hardware. If we don't reset the hardware the RX
stale interrupt never triggers and the only way to trigger an RX
handling event is by filling up the fifo. This causes things like
getty to not work so well considering it might change the baud
rate a few times. Fix this by moving the reset on startup and any
reprogramming required after the reset to be after we change the
baud rate.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/msm_serial.c')
| -rw-r--r-- | drivers/tty/serial/msm_serial.c | 49 |
1 files changed, 12 insertions, 37 deletions
diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c index d44c04976f7a..b507f5a16c1c 100644 --- a/drivers/tty/serial/msm_serial.c +++ b/drivers/tty/serial/msm_serial.c @@ -427,9 +427,6 @@ static int msm_set_baud_rate(struct uart_port *port, unsigned int baud) entry = msm_find_best_baud(port, baud); - if (msm_port->is_uartdm) - msm_write(port, UART_CR_CMD_RESET_RX, UART_CR); - msm_write(port, entry->code, UART_CSR); /* RX stale watermark */ @@ -446,6 +443,18 @@ static int msm_set_baud_rate(struct uart_port *port, unsigned int baud) /* set TX watermark */ msm_write(port, 10, UART_TFWR); + msm_write(port, UART_CR_CMD_PROTECTION_EN, UART_CR); + msm_reset(port); + + /* Enable RX and TX */ + msm_write(port, UART_CR_TX_ENABLE | UART_CR_RX_ENABLE, UART_CR); + + /* turn on RX and CTS interrupts */ + msm_port->imr = UART_IMR_RXLEV | UART_IMR_RXSTALE | + UART_IMR_CURRENT_CTS | UART_IMR_RXBREAK_START; + + msm_write(port, msm_port->imr, UART_IMR); + if (msm_port->is_uartdm) { msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR); msm_write(port, 0xFFFFFF, UARTDM_DMRX); @@ -492,40 +501,6 @@ static int msm_startup(struct uart_port *port) data |= UART_MR1_AUTO_RFR_LEVEL1 & (rfr_level << 2); data |= UART_MR1_AUTO_RFR_LEVEL0 & rfr_level; msm_write(port, data, UART_MR1); - - /* make sure that RXSTALE count is non-zero */ - data = msm_read(port, UART_IPR); - if (unlikely(!data)) { - data |= UART_IPR_RXSTALE_LAST; - data |= UART_IPR_STALE_LSB; - msm_write(port, data, UART_IPR); - } - - data = 0; - if (!port->cons || (port->cons && !(port->cons->flags & CON_ENABLED))) { - msm_write(port, UART_CR_CMD_PROTECTION_EN, UART_CR); - msm_reset(port); - data = UART_CR_TX_ENABLE; - } - - data |= UART_CR_RX_ENABLE; - msm_write(port, data, UART_CR); /* enable TX & RX */ - - /* Make sure IPR is not 0 to start with*/ - if (msm_port->is_uartdm) - msm_write(port, UART_IPR_STALE_LSB, UART_IPR); - - /* turn on RX and CTS interrupts */ - msm_port->imr = UART_IMR_RXLEV | UART_IMR_RXSTALE | - UART_IMR_CURRENT_CTS | UART_IMR_RXBREAK_START; - - if (msm_port->is_uartdm) { - msm_write(port, 0xFFFFFF, UARTDM_DMRX); - msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR); - msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR); - } - - msm_write(port, msm_port->imr, UART_IMR); return 0; } |