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| author | Mian Yousaf Kaukab <yousaf.kaukab@intel.com> | 2015-01-30 09:09:35 +0100 |
|---|---|---|
| committer | Felipe Balbi <balbi@ti.com> | 2015-01-30 10:33:54 -0600 |
| commit | fa4a8d722bc2f0b1887ea929874a0f6754eda8b4 (patch) | |
| tree | 6582579df9dbd6dd855187e219005b4fc03b4362 /drivers/usb/dwc2 | |
| parent | ccb34a9101b340885b1ca3ec766e8544a6a433a7 (diff) | |
| download | linux-fa4a8d722bc2f0b1887ea929874a0f6754eda8b4.tar.gz linux-fa4a8d722bc2f0b1887ea929874a0f6754eda8b4.tar.bz2 linux-fa4a8d722bc2f0b1887ea929874a0f6754eda8b4.zip | |
usb: dwc2: gadget: fix phy interface configuration
hsotg->phyif is set in dwc2_gadget_init according to phy interface
width. Use it for configuration instead of hardcoded value.
Moreover, set USB turnaround time according to phy width.
Tested-by: Robert Baldyga <r.baldyga@samsung.com>
Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/dwc2')
| -rw-r--r-- | drivers/usb/dwc2/gadget.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c index 38ba0221482e..8c3f8f8f769a 100644 --- a/drivers/usb/dwc2/gadget.c +++ b/drivers/usb/dwc2/gadget.c @@ -2290,8 +2290,9 @@ void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, */ /* set the PLL on, remove the HNP/SRP and set the PHY */ + val = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5; writel(hsotg->phyif | GUSBCFG_TOUTCAL(7) | - (0x5 << 10), hsotg->regs + GUSBCFG); + (val << 10), hsotg->regs + GUSBCFG); s3c_hsotg_init_fifo(hsotg); @@ -2978,6 +2979,7 @@ static void s3c_hsotg_phy_disable(struct dwc2_hsotg *hsotg) */ static void s3c_hsotg_init(struct dwc2_hsotg *hsotg) { + u32 trdtim; /* unmask subset of endpoint interrupts */ writel(DIEPMSK_TIMEOUTMSK | DIEPMSK_AHBERRMSK | @@ -3002,8 +3004,10 @@ static void s3c_hsotg_init(struct dwc2_hsotg *hsotg) s3c_hsotg_init_fifo(hsotg); /* set the PLL on, remove the HNP/SRP and set the PHY */ - writel(GUSBCFG_PHYIF16 | GUSBCFG_TOUTCAL(7) | (0x5 << 10), - hsotg->regs + GUSBCFG); + trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5; + writel(hsotg->phyif | GUSBCFG_TOUTCAL(7) | + (trdtim << 10), + hsotg->regs + GUSBCFG); if (using_dma(hsotg)) __orr32(hsotg->regs + GAHBCFG, GAHBCFG_DMA_EN); |