diff options
| author | Li Yang <leoli@freescale.com> | 2007-05-11 17:09:55 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2007-07-12 16:29:50 -0700 |
| commit | ba02978a48f0117b3d0aced97a30615a5d7412e2 (patch) | |
| tree | 940377b0118e4ab82969b45ce6847e6864db4ad1 /drivers/usb/host/ehci-fsl.c | |
| parent | 4d68c0be69b65aa260448cea9fb1c555ae90d268 (diff) | |
| download | linux-ba02978a48f0117b3d0aced97a30615a5d7412e2.tar.gz linux-ba02978a48f0117b3d0aced97a30615a5d7412e2.tar.bz2 linux-ba02978a48f0117b3d0aced97a30615a5d7412e2.zip | |
USB: ehci_fsl update for MPC831x support
For MPC831x support, change the ehci-fsl driver to preserve
bits set in platform code. Add a common CONFIG_USB_EHCI_FSL
to indicate presence of Freescale EHCI SOC. Add FSL_USB2_DR_OTG
operating mode support, thus both host and device can work for the
mini-ab receptacle. Note: this doesn't enable OTG protocol
support.
Signed-off-by: Li Yang <leoli@freescale.com>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/ehci-fsl.c')
| -rw-r--r-- | drivers/usb/host/ehci-fsl.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index c7a7c590426f..b7b7bfbce527 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -67,7 +67,8 @@ int usb_hcd_fsl_probe(const struct hc_driver *driver, * in host mode. */ if (!((pdata->operating_mode == FSL_USB2_DR_HOST) || - (pdata->operating_mode == FSL_USB2_MPH_HOST))) { + (pdata->operating_mode == FSL_USB2_MPH_HOST) || + (pdata->operating_mode == FSL_USB2_DR_OTG))) { dev_err(&pdev->dev, "Non Host Mode configured for %s. Wrong driver linked.\n", pdev->dev.bus_id); @@ -185,12 +186,14 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd) struct ehci_hcd *ehci = hcd_to_ehci(hcd); struct fsl_usb2_platform_data *pdata; void __iomem *non_ehci = hcd->regs; + u32 temp; pdata = (struct fsl_usb2_platform_data *)hcd->self.controller-> platform_data; /* Enable PHY interface in the control reg. */ - out_be32(non_ehci + FSL_SOC_USB_CTRL, 0x00000004); + temp = in_be32(non_ehci + FSL_SOC_USB_CTRL); + out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x00000004); out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0000001b); #if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) @@ -206,7 +209,8 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd) out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB); #endif - if (pdata->operating_mode == FSL_USB2_DR_HOST) + if ((pdata->operating_mode == FSL_USB2_DR_HOST) || + (pdata->operating_mode == FSL_USB2_DR_OTG)) mpc83xx_setup_phy(ehci, pdata->phy_mode, 0); if (pdata->operating_mode == FSL_USB2_MPH_HOST) { |