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| author | Nikhil Badola <nikhil.badola@freescale.com> | 2015-07-14 17:28:10 +0530 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-07-22 16:44:34 -0700 |
| commit | f4fdfaa280a284be8a056d6840cdbbf42c05bf95 (patch) | |
| tree | f6f5861ef5b2a10f3bcffa0748297c656f50aea2 /drivers/usb/host/ehci-fsl.c | |
| parent | 6009d95e04cf74c6f80db56fddca21fea476ad24 (diff) | |
| download | linux-f4fdfaa280a284be8a056d6840cdbbf42c05bf95.tar.gz linux-f4fdfaa280a284be8a056d6840cdbbf42c05bf95.tar.bz2 linux-f4fdfaa280a284be8a056d6840cdbbf42c05bf95.zip | |
drivers: usb: fsl: Modify phy clk valid bit checking
Phy_clk_valid bit is checked only when the boolean
property phy-clk-valid in present in usb node device tree.
This property is added to the usb node via device tree fixup.
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/host/ehci-fsl.c')
| -rw-r--r-- | drivers/usb/host/ehci-fsl.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index b04c9dbd5c7d..05ebe3dcd618 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -230,14 +230,14 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, break; } - if (pdata->have_sysif_regs && - pdata->controller_ver > FSL_USB_VER_1_6 && - (phy_mode == FSL_USB2_PHY_ULPI)) { - /* check PHY_CLK_VALID to get phy clk valid */ - if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) & - PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0) || - in_be32(non_ehci + FSL_SOC_USB_PRICTRL))) { - dev_warn(hcd->self.controller, "USB PHY clock invalid\n"); + /* + * check PHY_CLK_VALID to determine phy clock presence before writing + * to portsc + */ + if (pdata->check_phy_clk_valid) { + if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID)) { + dev_warn(hcd->self.controller, + "USB PHY clock invalid\n"); return -EINVAL; } } |