usb/uhci: Add support for Aspeed BMC SoCs

The Aspeed 2400/2500 families have a variant of UHCI which requires
some quirks to the driver to work:

 - The register offsets are different. We add a remapping helper.

 - All accesses have to be done via 32-bit loads and stores. We
   force all accessors to use readl/writel. This is of no consequence
   for reads as we never read "in the middle" of a register. For writes
   it also works fine as the registers only actually implement the bits
   we try to write (16-bit for the registers accessed with writew and
   8-bit for the register accessed with writeb), so always using a
   32-bit write will have no negative effect. We never do partial writes.

 - The resume detect interrupt is broken

 - The number of ports is (optionally) provided via the device-tree

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
--

v2. Remove the bulk of the #ifdef's

 drivers/usb/host/Kconfig         |  6 ++++-
 drivers/usb/host/uhci-hcd.c      | 17 +++++++++++---
 drivers/usb/host/uhci-hcd.h      | 51 ++++++++++++++++++++++++++++++++++++++++
 drivers/usb/host/uhci-platform.c | 22 ++++++++++++++++-
 4 files changed, 91 insertions(+), 5 deletions(-)
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

0 files changed, 0 insertions, 0 deletions