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authorBrice Goglin <brice@myri.com>2007-04-10 21:21:39 +0200
committerJeff Garzik <jeff@garzik.org>2007-04-11 11:54:44 -0400
commitf19baaeaadf9d77bcc6c122500c70b27c5bbc7a4 (patch)
tree24c927e32a7d9c33098ac84aa9718917835d9e35 /drivers
parentae8509b1876e6e1074edc9846296e80983e30502 (diff)
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myri10ge: more Intel chipsets providing aligned PCIe completions
Add the Intel 5000 southbridge (aka Intel 6310/6311/6321ESB) PCIe ports and the Intel E30x0 chipsets to the whitelist of aligned PCIe completion. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/myri10ge/myri10ge.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c
index 1e7fa2facbe1..756855930f34 100644
--- a/drivers/net/myri10ge/myri10ge.c
+++ b/drivers/net/myri10ge/myri10ge.c
@@ -2487,6 +2487,10 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
#define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7
#define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa
+#define PCI_DEVICE_ID_INTEL_6300ESB_PCIEE1 0x3510
+#define PCI_DEVICE_ID_INTEL_6300ESB_PCIEE4 0x351b
+#define PCI_DEVICE_ID_INTEL_E3000_PCIE 0x2779
+#define PCI_DEVICE_ID_INTEL_E3010_PCIE 0x277a
#define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST 0x140
#define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST 0x142
@@ -2526,6 +2530,18 @@ static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST
&& bridge->device <=
PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST)
+ /* All Intel E3000/E3010 PCIE ports */
+ || (bridge->vendor == PCI_VENDOR_ID_INTEL
+ && (bridge->device ==
+ PCI_DEVICE_ID_INTEL_E3000_PCIE
+ || bridge->device ==
+ PCI_DEVICE_ID_INTEL_E3010_PCIE))
+ /* All Intel 6310/6311/6321ESB PCIE ports */
+ || (bridge->vendor == PCI_VENDOR_ID_INTEL
+ && bridge->device >=
+ PCI_DEVICE_ID_INTEL_6300ESB_PCIEE1
+ && bridge->device <=
+ PCI_DEVICE_ID_INTEL_6300ESB_PCIEE4)
/* All Intel E5000 PCIE ports */
|| (bridge->vendor == PCI_VENDOR_ID_INTEL
&& bridge->device >=