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| author | Huang Rui <ray.huang@amd.com> | 2017-03-24 10:12:32 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-03-29 23:55:19 -0400 |
| commit | e96487a6a7288b46e6b8c0ec5b659bb4e59fbdab (patch) | |
| tree | 86598dd9f93d04b2da5c1556de5a2521bbf5b67c /drivers | |
| parent | 12ad27faa81e47875bd5a6daa43f33bddf12e6b6 (diff) | |
| download | linux-e96487a6a7288b46e6b8c0ec5b659bb4e59fbdab.tar.gz linux-e96487a6a7288b46e6b8c0ec5b659bb4e59fbdab.tar.bz2 linux-e96487a6a7288b46e6b8c0ec5b659bb4e59fbdab.zip | |
drm/amdgpu: add get_clockgating callback for nbio v6.1
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 15 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h | 1 |
3 files changed, 17 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c index f0094a312be9..67f4a5afdac3 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c @@ -49,6 +49,7 @@ static const struct cg_flag_name clocks[] = { {AMD_CG_SUPPORT_MC_MGCG, "Memory Controller Medium Grain Clock Gating"}, {AMD_CG_SUPPORT_SDMA_LS, "System Direct Memory Access Light Sleep"}, {AMD_CG_SUPPORT_SDMA_MGCG, "System Direct Memory Access Medium Grain Clock Gating"}, + {AMD_CG_SUPPORT_BIF_MGCG, "Bus Interface Medium Grain Clock Gating"}, {AMD_CG_SUPPORT_BIF_LS, "Bus Interface Light Sleep"}, {AMD_CG_SUPPORT_UVD_MGCG, "Unified Video Decoder Medium Grain Clock Gating"}, {AMD_CG_SUPPORT_VCE_MGCG, "Video Compression Engine Medium Grain Clock Gating"}, diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c index 902187206c86..97057f4a10de 100644 --- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c @@ -206,6 +206,21 @@ void nbio_v6_1_update_medium_grain_light_sleep(struct amdgpu_device *adev, WREG32_PCIE(smnPCIE_CNTL2, data); } +void nbio_v6_1_get_clockgating_state(struct amdgpu_device *adev, u32 *flags) +{ + int data; + + /* AMD_CG_SUPPORT_BIF_MGCG */ + data = RREG32_PCIE(smnCPM_CONTROL); + if (data & CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK) + *flags |= AMD_CG_SUPPORT_BIF_MGCG; + + /* AMD_CG_SUPPORT_BIF_LS */ + data = RREG32_PCIE(smnPCIE_CNTL2); + if (data & PCIE_CNTL2__SLV_MEM_LS_EN_MASK) + *flags |= AMD_CG_SUPPORT_BIF_LS; +} + struct nbio_hdp_flush_reg nbio_v6_1_hdp_flush_reg; struct nbio_pcie_index_data nbio_v6_1_pcie_index_data; diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h index 3e04093539f5..f6f8bc045518 100644 --- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h @@ -48,6 +48,7 @@ void nbio_v6_1_ih_control(struct amdgpu_device *adev); u32 nbio_v6_1_get_rev_id(struct amdgpu_device *adev); void nbio_v6_1_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable); void nbio_v6_1_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable); +void nbio_v6_1_get_clockgating_state(struct amdgpu_device *adev, u32 *flags); void nbio_v6_1_detect_hw_virt(struct amdgpu_device *adev); #endif |