diff options
| author | Shaohua Li <shaohua.li@intel.com> | 2009-10-10 15:20:55 +0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2009-10-13 10:09:26 -0700 |
| commit | 9216d44dc13b5e858253f06d83ceea25a9b72f4f (patch) | |
| tree | 1aa7d1e45f81dd6b9848cf56d4121fc221fc166a /drivers | |
| parent | 161291396e76e0832c08f617eb9bd364d1648148 (diff) | |
| download | linux-9216d44dc13b5e858253f06d83ceea25a9b72f4f.tar.gz linux-9216d44dc13b5e858253f06d83ceea25a9b72f4f.tar.bz2 linux-9216d44dc13b5e858253f06d83ceea25a9b72f4f.zip | |
drm/i915: disable FBC for Pineview, fixing a boot hang.
Pineview doesn't have this FBC mechanism, so this code doesn't apply.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_dma.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 2 |
2 files changed, 2 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 92aeb918e0c0..e5b138be45fa 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -1227,8 +1227,7 @@ static int i915_load_modeset_init(struct drm_device *dev, goto out; /* Try to set up FBC with a reasonable compressed buffer size */ - if (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev) || IS_GM45(dev)) && - i915_powersave) { + if (I915_HAS_FBC(dev) && i915_powersave) { int cfb_size; /* Try to get an 8M buffer... */ diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 6035d3dae851..0094f185e17d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -981,7 +981,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); #define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev)) #define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev)) -#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev))) +#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_GM45(dev)) && !IS_IGD(dev)) #define PRIMARY_RINGBUFFER_SIZE (128*1024) |