diff options
| author | Heiko Stübner <heiko@sntech.de> | 2014-05-23 22:58:53 +0200 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2014-05-26 12:09:45 -0700 |
| commit | 5a3babfcd2354fb1063de2895cab0320fb2027ca (patch) | |
| tree | 1e41f9e4dbc1a024fa8b5460e18d5fce28ecd84d /drivers | |
| parent | c40f01287b3369638c9cb145298a79cc7103f696 (diff) | |
| download | linux-5a3babfcd2354fb1063de2895cab0320fb2027ca.tar.gz linux-5a3babfcd2354fb1063de2895cab0320fb2027ca.tar.bz2 linux-5a3babfcd2354fb1063de2895cab0320fb2027ca.zip | |
clk: samsung: clk-s3c2410-dlck: do not use PNAME macro as it declares __initdata
The originally used PNAME macro from the core samsung clock infrastructure
declares the created array as initdata, creating section mismatch warnings
in the dclk driver.
Thus declare them directly, removing these warning.
Reported-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/samsung/clk-s3c2410-dclk.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/clk/samsung/clk-s3c2410-dclk.c b/drivers/clk/samsung/clk-s3c2410-dclk.c index 8d8dff005c10..c1726f46eddd 100644 --- a/drivers/clk/samsung/clk-s3c2410-dclk.c +++ b/drivers/clk/samsung/clk-s3c2410-dclk.c @@ -135,26 +135,26 @@ struct s3c24xx_dclk { #define to_s3c24xx_dclk1(x) \ container_of(x, struct s3c24xx_dclk, dclk1_div_change_nb) -PNAME(dclk_s3c2410_p) = { "pclk", "uclk" }; -PNAME(clkout0_s3c2410_p) = { "mpll", "upll", "fclk", "hclk", "pclk", +static const char *dclk_s3c2410_p[] = { "pclk", "uclk" }; +static const char *clkout0_s3c2410_p[] = { "mpll", "upll", "fclk", "hclk", "pclk", "gate_dclk0" }; -PNAME(clkout1_s3c2410_p) = { "mpll", "upll", "fclk", "hclk", "pclk", +static const char *clkout1_s3c2410_p[] = { "mpll", "upll", "fclk", "hclk", "pclk", "gate_dclk1" }; -PNAME(clkout0_s3c2412_p) = { "mpll", "upll", "rtc_clkout", +static const char *clkout0_s3c2412_p[] = { "mpll", "upll", "rtc_clkout", "hclk", "pclk", "gate_dclk0" }; -PNAME(clkout1_s3c2412_p) = { "xti", "upll", "fclk", "hclk", "pclk", +static const char *clkout1_s3c2412_p) = { "xti", "upll", "fclk", "hclk", "pclk", "gate_dclk1" }; -PNAME(clkout0_s3c2440_p) = { "xti", "upll", "fclk", "hclk", "pclk", +static const char *clkout0_s3c2440_p[] = { "xti", "upll", "fclk", "hclk", "pclk", "gate_dclk0" }; -PNAME(clkout1_s3c2440_p) = { "mpll", "upll", "rtc_clkout", +static const char *clkout1_s3c2440_p[] = { "mpll", "upll", "rtc_clkout", "hclk", "pclk", "gate_dclk1" }; -PNAME(dclk_s3c2443_p) = { "pclk", "epll" }; -PNAME(clkout0_s3c2443_p) = { "xti", "epll", "armclk", "hclk", "pclk", +static const char *dclk_s3c2443_p[] = { "pclk", "epll" }; +static const char *clkout0_s3c2443_p[] = { "xti", "epll", "armclk", "hclk", "pclk", "gate_dclk0" }; -PNAME(clkout1_s3c2443_p) = { "dummy", "epll", "rtc_clkout", +static const char *clkout1_s3c2443_p[] = { "dummy", "epll", "rtc_clkout", "hclk", "pclk", "gate_dclk1" }; #define DCLKCON_DCLK_DIV_MASK 0xf |