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authorAndi Kleen <ak@linux.intel.com>2011-03-16 15:44:33 -0400
committerRobert Richter <robert.richter@amd.com>2011-03-24 18:45:44 +0100
commit914a76ca5eedc9f286a36f61c4eaa95b451ba3e6 (patch)
treed55c23e10b7c7959d6e4b1a7aba30369e89a5d72 /fs/fscache/operation.c
parentec6b426c4dbb9eef40375c389746cab7e931a584 (diff)
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oprofile, x86: Allow setting EDGE/INV/CMASK for counter events
For some performance events it's useful to set the EDGE and INV bits and the CMASK mask in the counter control register. The list of predefined events Intel releases for each CPU has some events which require these settings to get more "natural" to use higher level events. oprofile currently doesn't allow this. This patch adds new extra configuration fields for them, so that they can be specified in oprofilefs. An updated oprofile daemon can then make use of this to set them. v2: Write back masked extra value to variable. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Robert Richter <robert.richter@amd.com>
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