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authorVineet Gupta <vgupta@synopsys.com>2015-08-03 18:27:56 +0530
committerVineet Gupta <vgupta@synopsys.com>2015-08-04 09:26:30 +0530
commit6de7abfbad1c6a45893a47a17c2ac91b551aa90d (patch)
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parente13c42ecbe580509451e021ba2586871e5b47640 (diff)
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ARCv2: [axs103_smp] Reduce clk for Quad FPGA configs
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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