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author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2006-11-30 20:39:18 +0000 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-11-30 22:52:28 +0000 |
commit | b7dc96d75309346c1213875be68fdbbec92da5e7 (patch) | |
tree | b6f85da5e99cb3f20fef42504ce7b82b4a69c6fc /include/asm-arm/arch-clps711x | |
parent | 0215ffb08ce99e2bb59eca114a99499a4d06e704 (diff) | |
download | linux-b7dc96d75309346c1213875be68fdbbec92da5e7.tar.gz linux-b7dc96d75309346c1213875be68fdbbec92da5e7.tar.bz2 linux-b7dc96d75309346c1213875be68fdbbec92da5e7.zip |
[ARM] Clean up discontigmem support
Most architectures have fairly simple discontiguous memory - a
simple set of successive regions each containing some memory.
These can be described simply as a log2 of their maximum size,
along with the base address of the first region and the number
of regions.
The base address is already described by PHYS_PFN_OFFSET, and
the number of regions via the MAX_NUMNODES and the number of
online nodes.
If we then supply the log2 of their maximum size, all the other
discontigmem macros can move into generic code.
There is one exception: lh7a40x seems to have a more complicated
setup; this is left alone.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-clps711x')
-rw-r--r-- | include/asm-arm/arch-clps711x/memory.h | 53 |
1 files changed, 10 insertions, 43 deletions
diff --git a/include/asm-arm/arch-clps711x/memory.h b/include/asm-arm/arch-clps711x/memory.h index c6e8dcf674de..42768cc8bfb4 100644 --- a/include/asm-arm/arch-clps711x/memory.h +++ b/include/asm-arm/arch-clps711x/memory.h @@ -62,7 +62,15 @@ * memory bank. For those systems, simply undefine CONFIG_DISCONTIGMEM. */ -#ifdef CONFIG_DISCONTIGMEM +/* + * The PS7211 allows up to 256MB max per DRAM bank, but the EDB7211 + * uses only one of the two banks (bank #1). However, even within + * bank #1, memory is discontiguous. + * + * The EDB7211 has two 8MB DRAM areas with 8MB of empty space between + * them, so we use 24 for the node max shift to get 16MB node sizes. + */ + /* * Because of the wide memory address space between physical RAM banks on the * SA1100, it's much more convenient to use Linux's NUMA support to implement @@ -80,48 +88,7 @@ * node 2: 0xd0000000 - 0xd7ffffff * node 3: 0xd8000000 - 0xdfffffff */ - -/* - * Given a kernel address, find the home node of the underlying memory. - */ -#define KVADDR_TO_NID(addr) \ - (((unsigned long)(addr) - PAGE_OFFSET) >> NODE_MAX_MEM_SHIFT) - -/* - * Given a page frame number, convert it to a node id. - */ -#define PFN_TO_NID(pfn) \ - (((pfn) - PHYS_PFN_OFFSET) >> (NODE_MAX_MEM_SHIFT - PAGE_SHIFT)) - -/* - * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory - * and returns the mem_map of that node. - */ -#define ADDR_TO_MAPBASE(kaddr) \ - NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr))) - -#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn)) - -/* - * Given a kaddr, LOCAL_MAR_NR finds the owning node of the memory - * and returns the index corresponding to the appropriate page in the - * node's mem_map. - */ -#define LOCAL_MAP_NR(addr) \ - (((unsigned long)(addr) & (NODE_MAX_MEM_SIZE - 1)) >> PAGE_SHIFT) - -/* - * The PS7211 allows up to 256MB max per DRAM bank, but the EDB7211 - * uses only one of the two banks (bank #1). However, even within - * bank #1, memory is discontiguous. - * - * The EDB7211 has two 8MB DRAM areas with 8MB of empty space between - * them, so we use 24 for the node max shift to get 16MB node sizes. - */ -#define NODE_MAX_MEM_SHIFT 24 -#define NODE_MAX_MEM_SIZE (1<<NODE_MAX_MEM_SHIFT) - -#endif /* CONFIG_DISCONTIGMEM */ +#define NODE_MEM_SIZE_BITS 24 #endif |