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author | Mike Frysinger <michael.frysinger@analog.com> | 2007-11-21 15:55:45 +0800 |
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committer | Bryan Wu <bryan.wu@analog.com> | 2007-11-21 15:55:45 +0800 |
commit | 81a487a59f246a9eba24c3622e4c964e3347239d (patch) | |
tree | eea510c54d09abcacf508ec473181162406cfc0b /include/asm-blackfin | |
parent | 9f2ff54d7291d4386dc02d6a153e6cc621f32aa8 (diff) | |
download | linux-81a487a59f246a9eba24c3622e4c964e3347239d.tar.gz linux-81a487a59f246a9eba24c3622e4c964e3347239d.tar.bz2 linux-81a487a59f246a9eba24c3622e4c964e3347239d.zip |
Blackfin arch: cleanup the cplb declares
- no need to declare their sizes in the common header
- no need to tack on the section attribute as only the definition matters, not references
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin')
-rw-r--r-- | include/asm-blackfin/cplbinit.h | 33 |
1 files changed, 12 insertions, 21 deletions
diff --git a/include/asm-blackfin/cplbinit.h b/include/asm-blackfin/cplbinit.h index bec6ecdf1bdb..c4d0596e8e9f 100644 --- a/include/asm-blackfin/cplbinit.h +++ b/include/asm-blackfin/cplbinit.h @@ -27,6 +27,9 @@ * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#ifndef __ASM_CPLBINIT_H__ +#define __ASM_CPLBINIT_H__ + #include <asm/blackfin.h> #include <asm/cplb.h> @@ -57,8 +60,8 @@ struct cplb_tab { u16 size; }; -extern u_long icplb_table[MAX_CPLBS+1]; -extern u_long dcplb_table[MAX_CPLBS+1]; +extern u_long icplb_table[]; +extern u_long dcplb_table[]; /* Till here we are discussing about the static memory management model. * However, the operating envoronments commonly define more CPLB @@ -69,28 +72,16 @@ extern u_long dcplb_table[MAX_CPLBS+1]; * This is how Page descriptor Table is implemented in uClinux/Blackfin. */ -#ifdef CONFIG_CPLB_SWITCH_TAB_L1 -extern u_long ipdt_table[MAX_SWITCH_I_CPLBS+1]__attribute__((l1_data)); -extern u_long dpdt_table[MAX_SWITCH_D_CPLBS+1]__attribute__((l1_data)); - -#ifdef CONFIG_CPLB_INFO -extern u_long ipdt_swapcount_table[MAX_SWITCH_I_CPLBS]__attribute__((l1_data)); -extern u_long dpdt_swapcount_table[MAX_SWITCH_D_CPLBS]__attribute__((l1_data)); -#endif /* CONFIG_CPLB_INFO */ - -#else - -extern u_long ipdt_table[MAX_SWITCH_I_CPLBS+1]; -extern u_long dpdt_table[MAX_SWITCH_D_CPLBS+1]; - +extern u_long ipdt_table[]; +extern u_long dpdt_table[]; #ifdef CONFIG_CPLB_INFO -extern u_long ipdt_swapcount_table[MAX_SWITCH_I_CPLBS]; -extern u_long dpdt_swapcount_table[MAX_SWITCH_D_CPLBS]; -#endif /* CONFIG_CPLB_INFO */ - -#endif /*CONFIG_CPLB_SWITCH_TAB_L1*/ +extern u_long ipdt_swapcount_table[]; +extern u_long dpdt_swapcount_table[]; +#endif extern unsigned long reserved_mem_dcache_on; extern unsigned long reserved_mem_icache_on; extern void generate_cpl_tables(void); + +#endif |