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author | Zachary Amsden <zach@vmware.com> | 2006-09-30 23:29:35 -0700 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-10-01 00:39:34 -0700 |
commit | 23002d88be309a7c78db69363c9d933a29a3b0bb (patch) | |
tree | ecd99ef70c0f38ff81bf2e3c6d7caeed2b88b41e /include/asm-i386/pgtable-3level.h | |
parent | 25e4df5bae333a06cd2c9b88baf14432652dc9f7 (diff) | |
download | linux-23002d88be309a7c78db69363c9d933a29a3b0bb.tar.gz linux-23002d88be309a7c78db69363c9d933a29a3b0bb.tar.bz2 linux-23002d88be309a7c78db69363c9d933a29a3b0bb.zip |
[PATCH] paravirt: kpte flush
Create a new PTE function which combines clearing a kernel PTE with the
subsequent flush. This allows the two to be easily combined into a single
hypercall or paravirt-op. More subtly, reverse the order of the flush for
kmap_atomic. Instead of flushing on establishing a mapping, flush on clearing
a mapping. This eliminates the possibility of leaving stale kmap entries
which may still have valid TLB mappings. This is required for direct mode
hypervisors, which need to reprotect all mappings of a given page when
changing the page type from a normal page to a protected page (such as a page
table or descriptor table page). But it also provides some nicer semantics
for real hardware, by providing extra debug-proofing against using stale
mappings, as well as ensuring that no stale mappings exist when changing the
cacheability attributes of a page, which could lead to cache conflicts when
two different types of mappings exist for the same page.
Signed-off-by: Zachary Amsden <zach@vmware.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Jeremy Fitzhardinge <jeremy@xensource.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-i386/pgtable-3level.h')
0 files changed, 0 insertions, 0 deletions