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| author | Ashok Raj <ashok.raj@intel.com> | 2005-11-08 21:42:33 -0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2005-11-10 16:09:18 -0800 |
| commit | b4033c1715cb5aa1dcb1a25bdaf71fea908bb3f1 (patch) | |
| tree | cf9ba9ae7999573a507df301faf34170ab08e2c3 /include/asm-ia64 | |
| parent | 48b19148733b4826eeedfd8be9f19b61c8d010b1 (diff) | |
| download | linux-b4033c1715cb5aa1dcb1a25bdaf71fea908bb3f1.tar.gz linux-b4033c1715cb5aa1dcb1a25bdaf71fea908bb3f1.tar.bz2 linux-b4033c1715cb5aa1dcb1a25bdaf71fea908bb3f1.zip | |
[PATCH] PCI: Change MSI to use physical delivery mode always
MSI hardcoded delivery mode to use logical delivery mode. Recently
x86_64 moved to use physical mode addressing to support physflat mode.
With this mode enabled noticed that my eth with MSI werent working.
msi_address_init() was hardcoded to use logical mode for i386 and x86_64.
So when we switch to use physical mode, things stopped working.
Since anyway we dont use lowest priority delivery with MSI, its always
directed to just a single CPU. Its safe and simpler to use
physical mode always, even when we use logical delivery mode for IPI's
or other ioapic RTE's.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include/asm-ia64')
| -rw-r--r-- | include/asm-ia64/msi.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/include/asm-ia64/msi.h b/include/asm-ia64/msi.h index 60f2137f9278..97890f7762b3 100644 --- a/include/asm-ia64/msi.h +++ b/include/asm-ia64/msi.h @@ -12,9 +12,6 @@ static inline void set_intr_gate (int nr, void *func) {} #define IO_APIC_VECTOR(irq) (irq) #define ack_APIC_irq ia64_eoi -#define cpu_mask_to_apicid(mask) cpu_physical_id(first_cpu(mask)) -#define MSI_DEST_MODE MSI_PHYSICAL_MODE -#define MSI_TARGET_CPU ((ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff) #define MSI_TARGET_CPU_SHIFT 4 #endif /* ASM_MSI_H */ |