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| author | Ralf Baechle <ralf@linux-mips.org> | 2005-05-31 11:49:19 +0000 |
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| committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 19:31:17 +0100 |
| commit | e50c0a8fa60da9ac0e0a70caa8a3a803815c1f2f (patch) | |
| tree | 1928e8b0a4b7fb615e5a9f65dc934ba2e74cb9cd /include/asm-mips/dsp.h | |
| parent | 10f650db1bcc193ea07d4f8c2f07315da38ea0c4 (diff) | |
| download | linux-e50c0a8fa60da9ac0e0a70caa8a3a803815c1f2f.tar.gz linux-e50c0a8fa60da9ac0e0a70caa8a3a803815c1f2f.tar.bz2 linux-e50c0a8fa60da9ac0e0a70caa8a3a803815c1f2f.zip | |
Support the MIPS32 / MIPS64 DSP ASE.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/dsp.h')
| -rw-r--r-- | include/asm-mips/dsp.h | 83 |
1 files changed, 83 insertions, 0 deletions
diff --git a/include/asm-mips/dsp.h b/include/asm-mips/dsp.h new file mode 100644 index 000000000000..50f556bb4978 --- /dev/null +++ b/include/asm-mips/dsp.h @@ -0,0 +1,83 @@ +/* + * Copyright (C) 2005 Mips Technologies + * Author: Chris Dearman, chris@mips.com derived from fpu.h + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#ifndef _ASM_DSP_H +#define _ASM_DSP_H + +#include <asm/cpu.h> +#include <asm/cpu-features.h> +#include <asm/hazards.h> +#include <asm/mipsregs.h> + +#define DSP_DEFAULT 0x00000000 +#define DSP_MASK 0x1f + +#define __enable_dsp_hazard() \ +do { \ + asm("_ehb"); \ +} while (0) + +static inline void __init_dsp(void) +{ + mthi1(0); + mtlo1(0); + mthi2(0); + mtlo2(0); + mthi3(0); + mtlo3(0); + wrdsp(DSP_DEFAULT, DSP_MASK); +} + +static inline void init_dsp(void) +{ + if (cpu_has_dsp) + __init_dsp(); +} + +#define __save_dsp(tsk) \ +do { \ + tsk->thread.dsp.dspr[0] = mfhi1(); \ + tsk->thread.dsp.dspr[1] = mflo1(); \ + tsk->thread.dsp.dspr[2] = mfhi2(); \ + tsk->thread.dsp.dspr[3] = mflo2(); \ + tsk->thread.dsp.dspr[4] = mfhi3(); \ + tsk->thread.dsp.dspr[5] = mflo3(); \ +} while (0) + +#define save_dsp(tsk) \ +do { \ + if (cpu_has_dsp) \ + __save_dsp(tsk); \ +} while (0) + +#define __restore_dsp(tsk) \ +do { \ + mthi1(tsk->thread.dsp.dspr[0]); \ + mtlo1(tsk->thread.dsp.dspr[1]); \ + mthi2(tsk->thread.dsp.dspr[2]); \ + mtlo2(tsk->thread.dsp.dspr[3]); \ + mthi3(tsk->thread.dsp.dspr[4]); \ + mtlo3(tsk->thread.dsp.dspr[5]); \ +} while (0) + +#define restore_dsp(tsk) \ +do { \ + if (cpu_has_dsp) \ + __restore_dsp(tsk); \ +} while (0) + +#define __get_dsp_regs(tsk) \ +({ \ + if (tsk == current) \ + __save_dsp(current); \ + \ + tsk->thread.dsp.dspr; \ +}) + +#endif /* _ASM_DSP_H */ |