diff options
| author | Vitaly Bordug <vbordug@ru.mvista.com> | 2006-04-29 22:32:44 +0400 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2006-05-03 23:06:43 +1000 |
| commit | 61f5657c50341198ff05e375e6f1fc0476556562 (patch) | |
| tree | 33c0fa26dc730885176f4be2a8853b1c0b65aa8a /include/asm-ppc | |
| parent | 0ccde0a290b44b8296b82a7683b4c299eb51ba6b (diff) | |
| download | linux-61f5657c50341198ff05e375e6f1fc0476556562.tar.gz linux-61f5657c50341198ff05e375e6f1fc0476556562.tar.bz2 linux-61f5657c50341198ff05e375e6f1fc0476556562.zip | |
[PATCH] ppc32 CPM_UART: Fixed break send on SCC
SCC uart sends a break sequence each time it is stopped with the
CPM_CR_STOP_TX command. That means that each time an application closes the
serial device, a break is transmitted. To fix this, graceful tx stop is
issued for SCC.
Signed-off-by: David Jander <david.jander@protonic.nl>
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-ppc')
| -rw-r--r-- | include/asm-ppc/commproc.h | 1 | ||||
| -rw-r--r-- | include/asm-ppc/cpm2.h | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/include/asm-ppc/commproc.h b/include/asm-ppc/commproc.h index 973e60908234..31f362966a58 100644 --- a/include/asm-ppc/commproc.h +++ b/include/asm-ppc/commproc.h @@ -35,6 +35,7 @@ #define CPM_CR_INIT_TX ((ushort)0x0002) #define CPM_CR_HUNT_MODE ((ushort)0x0003) #define CPM_CR_STOP_TX ((ushort)0x0004) +#define CPM_CR_GRA_STOP_TX ((ushort)0x0005) #define CPM_CR_RESTART_TX ((ushort)0x0006) #define CPM_CR_CLOSE_RX_BD ((ushort)0x0007) #define CPM_CR_SET_GADDR ((ushort)0x0008) diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h index b638b87cebe3..c70344b91049 100644 --- a/include/asm-ppc/cpm2.h +++ b/include/asm-ppc/cpm2.h @@ -69,7 +69,7 @@ #define CPM_CR_INIT_TX ((ushort)0x0002) #define CPM_CR_HUNT_MODE ((ushort)0x0003) #define CPM_CR_STOP_TX ((ushort)0x0004) -#define CPM_CR_GRA_STOP_TX ((ushort)0x0005) +#define CPM_CR_GRA_STOP_TX ((ushort)0x0005) #define CPM_CR_RESTART_TX ((ushort)0x0006) #define CPM_CR_SET_GADDR ((ushort)0x0008) #define CPM_CR_START_IDMA ((ushort)0x0009) |