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| author | David S. Miller <davem@davemloft.net> | 2005-05-31 16:57:59 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2005-05-31 16:57:59 -0700 |
| commit | 7c963ad1d113790a8c723a178988b675868f3abe (patch) | |
| tree | 2e1cc54795aeca06a11801636737901ba71a2ed8 /include/asm-sparc64/pbm.h | |
| parent | 2e3e80c2b75e3815a0160cbd23d4fdb767d66b35 (diff) | |
| download | linux-7c963ad1d113790a8c723a178988b675868f3abe.tar.gz linux-7c963ad1d113790a8c723a178988b675868f3abe.tar.bz2 linux-7c963ad1d113790a8c723a178988b675868f3abe.zip | |
[SPARC64]: Fix streaming buffer flushing on PCI and SBUS.
Firstly, if the direction is TODEVICE, then dirty data in the
streaming cache is impossible so we can elide the flush-flag
synchronization in that case.
Next, the context allocator is broken. It is highly likely
that contexts get used multiple times for different dma
mappings, which confuses the strbuf flushing code and makes
it run inefficiently.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64/pbm.h')
| -rw-r--r-- | include/asm-sparc64/pbm.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/include/asm-sparc64/pbm.h b/include/asm-sparc64/pbm.h index 92999631c819..4c15610a2bac 100644 --- a/include/asm-sparc64/pbm.h +++ b/include/asm-sparc64/pbm.h @@ -15,6 +15,7 @@ #include <asm/io.h> #include <asm/page.h> #include <asm/oplib.h> +#include <asm/iommu.h> /* The abstraction used here is that there are PCI controllers, * each with one (Sabre) or two (PSYCHO/SCHIZO) PCI bus modules @@ -40,9 +41,6 @@ struct pci_iommu { */ spinlock_t lock; - /* Context allocator. */ - unsigned int iommu_cur_ctx; - /* IOMMU page table, a linear array of ioptes. */ iopte_t *page_table; /* The page table itself. */ int page_table_sz_bits; /* log2 of ow many pages does it map? */ @@ -87,6 +85,10 @@ struct pci_iommu { u16 flush; } alloc_info[PBM_NCLUSTERS]; + /* CTX allocation. */ + unsigned long ctx_lowest_free; + unsigned long ctx_bitmap[IOMMU_NUM_CTXS / (sizeof(unsigned long) * 8)]; + /* Here a PCI controller driver describes the areas of * PCI memory space where DMA to/from physical memory * are addressed. Drivers interrogate the PCI layer |