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author | David S. Miller <davem@sunset.davemloft.net> | 2007-10-27 00:13:04 -0700 |
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committer | David S. Miller <davem@sunset.davemloft.net> | 2007-10-27 00:13:04 -0700 |
commit | d979f1792d1a4867eda0028b3aac8c6d4a535bb7 (patch) | |
tree | 89a8a9471ad2fa57f7349426ac62d14f3f134c63 /include/asm-sparc64 | |
parent | ec3b67c11df42362ccda81261d62829042f223f0 (diff) | |
download | linux-d979f1792d1a4867eda0028b3aac8c6d4a535bb7.tar.gz linux-d979f1792d1a4867eda0028b3aac8c6d4a535bb7.tar.bz2 linux-d979f1792d1a4867eda0028b3aac8c6d4a535bb7.zip |
[SPARC64]: __inline__ --> inline
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64')
-rw-r--r-- | include/asm-sparc64/atomic.h | 7 | ||||
-rw-r--r-- | include/asm-sparc64/byteorder.h | 7 | ||||
-rw-r--r-- | include/asm-sparc64/fpumacro.h | 4 | ||||
-rw-r--r-- | include/asm-sparc64/io.h | 29 | ||||
-rw-r--r-- | include/asm-sparc64/irq.h | 11 | ||||
-rw-r--r-- | include/asm-sparc64/mostek.h | 9 | ||||
-rw-r--r-- | include/asm-sparc64/ns87303.h | 5 | ||||
-rw-r--r-- | include/asm-sparc64/parport.h | 21 | ||||
-rw-r--r-- | include/asm-sparc64/posix_types.h | 8 | ||||
-rw-r--r-- | include/asm-sparc64/sbus.h | 4 | ||||
-rw-r--r-- | include/asm-sparc64/spitfire.h | 53 | ||||
-rw-r--r-- | include/asm-sparc64/system.h | 9 | ||||
-rw-r--r-- | include/asm-sparc64/upa.h | 17 | ||||
-rw-r--r-- | include/asm-sparc64/visasm.h | 3 |
14 files changed, 88 insertions, 99 deletions
diff --git a/include/asm-sparc64/atomic.h b/include/asm-sparc64/atomic.h index 3fb4e1f7f186..2c71ec4a3b18 100644 --- a/include/asm-sparc64/atomic.h +++ b/include/asm-sparc64/atomic.h @@ -1,5 +1,4 @@ -/* $Id: atomic.h,v 1.22 2001/07/11 23:56:07 davem Exp $ - * atomic.h: Thankfully the V9 is at least reasonable for this +/* atomic.h: Thankfully the V9 is at least reasonable for this * stuff. * * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com) @@ -74,7 +73,7 @@ extern int atomic64_sub_ret(int, atomic64_t *); #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) -static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) +static inline int atomic_add_unless(atomic_t *v, int a, int u) { int c, old; c = atomic_read(v); @@ -95,7 +94,7 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) #define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) -static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) +static inline int atomic64_add_unless(atomic64_t *v, long a, long u) { long c, old; c = atomic64_read(v); diff --git a/include/asm-sparc64/byteorder.h b/include/asm-sparc64/byteorder.h index c69b08af5fe0..3943022906fd 100644 --- a/include/asm-sparc64/byteorder.h +++ b/include/asm-sparc64/byteorder.h @@ -1,4 +1,3 @@ -/* $Id: byteorder.h,v 1.8 1997/12/18 02:44:14 ecd Exp $ */ #ifndef _SPARC64_BYTEORDER_H #define _SPARC64_BYTEORDER_H @@ -7,7 +6,7 @@ #ifdef __GNUC__ -static __inline__ __u16 ___arch__swab16p(const __u16 *addr) +static inline __u16 ___arch__swab16p(const __u16 *addr) { __u16 ret; @@ -17,7 +16,7 @@ static __inline__ __u16 ___arch__swab16p(const __u16 *addr) return ret; } -static __inline__ __u32 ___arch__swab32p(const __u32 *addr) +static inline __u32 ___arch__swab32p(const __u32 *addr) { __u32 ret; @@ -27,7 +26,7 @@ static __inline__ __u32 ___arch__swab32p(const __u32 *addr) return ret; } -static __inline__ __u64 ___arch__swab64p(const __u64 *addr) +static inline __u64 ___arch__swab64p(const __u64 *addr) { __u64 ret; diff --git a/include/asm-sparc64/fpumacro.h b/include/asm-sparc64/fpumacro.h index d583e5efd75d..cc463fec806f 100644 --- a/include/asm-sparc64/fpumacro.h +++ b/include/asm-sparc64/fpumacro.h @@ -16,7 +16,7 @@ struct fpustate { #define FPUSTATE (struct fpustate *)(current_thread_info()->fpregs) -static __inline__ unsigned long fprs_read(void) +static inline unsigned long fprs_read(void) { unsigned long retval; @@ -25,7 +25,7 @@ static __inline__ unsigned long fprs_read(void) return retval; } -static __inline__ void fprs_write(unsigned long val) +static inline void fprs_write(unsigned long val) { __asm__ __volatile__("wr %0, 0x0, %%fprs" : : "r" (val)); } diff --git a/include/asm-sparc64/io.h b/include/asm-sparc64/io.h index cd7ef3097ac2..c299b853b5ba 100644 --- a/include/asm-sparc64/io.h +++ b/include/asm-sparc64/io.h @@ -1,4 +1,3 @@ -/* $Id: io.h,v 1.47 2001/12/13 10:36:02 davem Exp $ */ #ifndef __SPARC64_IO_H #define __SPARC64_IO_H @@ -19,7 +18,7 @@ extern unsigned long kern_base, kern_size; #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) #define BIO_VMERGE_BOUNDARY 8192 -static __inline__ u8 _inb(unsigned long addr) +static inline u8 _inb(unsigned long addr) { u8 ret; @@ -30,7 +29,7 @@ static __inline__ u8 _inb(unsigned long addr) return ret; } -static __inline__ u16 _inw(unsigned long addr) +static inline u16 _inw(unsigned long addr) { u16 ret; @@ -41,7 +40,7 @@ static __inline__ u16 _inw(unsigned long addr) return ret; } -static __inline__ u32 _inl(unsigned long addr) +static inline u32 _inl(unsigned long addr) { u32 ret; @@ -52,21 +51,21 @@ static __inline__ u32 _inl(unsigned long addr) return ret; } -static __inline__ void _outb(u8 b, unsigned long addr) +static inline void _outb(u8 b, unsigned long addr) { __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */" : /* no outputs */ : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); } -static __inline__ void _outw(u16 w, unsigned long addr) +static inline void _outw(u16 w, unsigned long addr) { __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */" : /* no outputs */ : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); } -static __inline__ void _outl(u32 l, unsigned long addr) +static inline void _outl(u32 l, unsigned long addr) { __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */" : /* no outputs */ @@ -205,7 +204,7 @@ static inline void _writeq(u64 q, volatile void __iomem *addr) #define writeq(__q, __addr) _writeq(__q, __addr) /* Now versions without byte-swapping. */ -static __inline__ u8 _raw_readb(unsigned long addr) +static inline u8 _raw_readb(unsigned long addr) { u8 ret; @@ -216,7 +215,7 @@ static __inline__ u8 _raw_readb(unsigned long addr) return ret; } -static __inline__ u16 _raw_readw(unsigned long addr) +static inline u16 _raw_readw(unsigned long addr) { u16 ret; @@ -227,7 +226,7 @@ static __inline__ u16 _raw_readw(unsigned long addr) return ret; } -static __inline__ u32 _raw_readl(unsigned long addr) +static inline u32 _raw_readl(unsigned long addr) { u32 ret; @@ -238,7 +237,7 @@ static __inline__ u32 _raw_readl(unsigned long addr) return ret; } -static __inline__ u64 _raw_readq(unsigned long addr) +static inline u64 _raw_readq(unsigned long addr) { u64 ret; @@ -249,28 +248,28 @@ static __inline__ u64 _raw_readq(unsigned long addr) return ret; } -static __inline__ void _raw_writeb(u8 b, unsigned long addr) +static inline void _raw_writeb(u8 b, unsigned long addr) { __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */" : /* no outputs */ : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); } -static __inline__ void _raw_writew(u16 w, unsigned long addr) +static inline void _raw_writew(u16 w, unsigned long addr) { __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */" : /* no outputs */ : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); } -static __inline__ void _raw_writel(u32 l, unsigned long addr) +static inline void _raw_writel(u32 l, unsigned long addr) { __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */" : /* no outputs */ : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); } -static __inline__ void _raw_writeq(u64 q, unsigned long addr) +static inline void _raw_writeq(u64 q, unsigned long addr) { __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */" : /* no outputs */ diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h index 182dba05c702..30cb76b47be1 100644 --- a/include/asm-sparc64/irq.h +++ b/include/asm-sparc64/irq.h @@ -1,7 +1,6 @@ -/* $Id: irq.h,v 1.21 2002/01/23 11:27:36 davem Exp $ - * irq.h: IRQ registers on the 64-bit Sparc. +/* irq.h: IRQ registers on the 64-bit Sparc. * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1996 David S. Miller (davem@davemloft.net) * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz) */ @@ -67,21 +66,21 @@ extern void virt_irq_free(unsigned int virt_irq); extern void fixup_irqs(void); -static __inline__ void set_softint(unsigned long bits) +static inline void set_softint(unsigned long bits) { __asm__ __volatile__("wr %0, 0x0, %%set_softint" : /* No outputs */ : "r" (bits)); } -static __inline__ void clear_softint(unsigned long bits) +static inline void clear_softint(unsigned long bits) { __asm__ __volatile__("wr %0, 0x0, %%clear_softint" : /* No outputs */ : "r" (bits)); } -static __inline__ unsigned long get_softint(void) +static inline unsigned long get_softint(void) { unsigned long retval; diff --git a/include/asm-sparc64/mostek.h b/include/asm-sparc64/mostek.h index d14dd8988161..c5652de2ace2 100644 --- a/include/asm-sparc64/mostek.h +++ b/include/asm-sparc64/mostek.h @@ -1,7 +1,6 @@ -/* $Id: mostek.h,v 1.4 2001/01/11 15:07:09 davem Exp $ - * mostek.h: Describes the various Mostek time of day clock registers. +/* mostek.h: Describes the various Mostek time of day clock registers. * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1995 David S. Miller (davem@davemloft.net) * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) */ @@ -38,7 +37,7 @@ * * We now deal with physical addresses for I/O to the chip. -DaveM */ -static __inline__ u8 mostek_read(void __iomem *addr) +static inline u8 mostek_read(void __iomem *addr) { u8 ret; @@ -48,7 +47,7 @@ static __inline__ u8 mostek_read(void __iomem *addr) return ret; } -static __inline__ void mostek_write(void __iomem *addr, u8 val) +static inline void mostek_write(void __iomem *addr, u8 val) { __asm__ __volatile__("stba %0, [%1] %2" : /* no outputs */ diff --git a/include/asm-sparc64/ns87303.h b/include/asm-sparc64/ns87303.h index 6d58fdf349b5..686defe6aaa0 100644 --- a/include/asm-sparc64/ns87303.h +++ b/include/asm-sparc64/ns87303.h @@ -1,5 +1,4 @@ -/* $Id: ns87303.h,v 1.3 2000/01/09 15:16:34 ecd Exp $ - * ns87303.h: Configuration Register Description for the +/* ns87303.h: Configuration Register Description for the * National Semiconductor PC87303 (SuperIO). * * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) @@ -85,7 +84,7 @@ extern spinlock_t ns87303_lock; -static __inline__ int ns87303_modify(unsigned long port, unsigned int index, +static inline int ns87303_modify(unsigned long port, unsigned int index, unsigned char clr, unsigned char set) { static unsigned char reserved[] = { diff --git a/include/asm-sparc64/parport.h b/include/asm-sparc64/parport.h index 8116e8f6062c..e9555b246c8d 100644 --- a/include/asm-sparc64/parport.h +++ b/include/asm-sparc64/parport.h @@ -1,5 +1,4 @@ -/* $Id: parport.h,v 1.11 2001/05/11 07:54:24 davem Exp $ - * parport.h: sparc64 specific parport initialization and dma. +/* parport.h: sparc64 specific parport initialization and dma. * * Copyright (C) 1999 Eddie C. Dost (ecd@skynet.be) */ @@ -42,7 +41,7 @@ static struct sparc_ebus_info { static DECLARE_BITMAP(dma_slot_map, PARPORT_PC_MAX_PORTS); -static __inline__ int request_dma(unsigned int dmanr, const char *device_id) +static inline int request_dma(unsigned int dmanr, const char *device_id) { if (dmanr >= PARPORT_PC_MAX_PORTS) return -EINVAL; @@ -51,7 +50,7 @@ static __inline__ int request_dma(unsigned int dmanr, const char *device_id) return 0; } -static __inline__ void free_dma(unsigned int dmanr) +static inline void free_dma(unsigned int dmanr) { if (dmanr >= PARPORT_PC_MAX_PORTS) { printk(KERN_WARNING "Trying to free DMA%d\n", dmanr); @@ -63,7 +62,7 @@ static __inline__ void free_dma(unsigned int dmanr) } } -static __inline__ void enable_dma(unsigned int dmanr) +static inline void enable_dma(unsigned int dmanr) { ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1); @@ -73,32 +72,32 @@ static __inline__ void enable_dma(unsigned int dmanr) BUG(); } -static __inline__ void disable_dma(unsigned int dmanr) +static inline void disable_dma(unsigned int dmanr) { ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 0); } -static __inline__ void clear_dma_ff(unsigned int dmanr) +static inline void clear_dma_ff(unsigned int dmanr) { /* nothing */ } -static __inline__ void set_dma_mode(unsigned int dmanr, char mode) +static inline void set_dma_mode(unsigned int dmanr, char mode) { ebus_dma_prepare(&sparc_ebus_dmas[dmanr].info, (mode != DMA_MODE_WRITE)); } -static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int addr) +static inline void set_dma_addr(unsigned int dmanr, unsigned int addr) { sparc_ebus_dmas[dmanr].addr = addr; } -static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) +static inline void set_dma_count(unsigned int dmanr, unsigned int count) { sparc_ebus_dmas[dmanr].count = count; } -static __inline__ unsigned int get_dma_residue(unsigned int dmanr) +static inline unsigned int get_dma_residue(unsigned int dmanr) { return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info); } diff --git a/include/asm-sparc64/posix_types.h b/include/asm-sparc64/posix_types.h index c86b9452c683..3426a65ecd35 100644 --- a/include/asm-sparc64/posix_types.h +++ b/include/asm-sparc64/posix_types.h @@ -53,7 +53,7 @@ typedef struct { #if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) #undef __FD_SET -static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) +static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) { unsigned long _tmp = fd / __NFDBITS; unsigned long _rem = fd % __NFDBITS; @@ -61,7 +61,7 @@ static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) } #undef __FD_CLR -static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) +static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) { unsigned long _tmp = fd / __NFDBITS; unsigned long _rem = fd % __NFDBITS; @@ -69,7 +69,7 @@ static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) } #undef __FD_ISSET -static __inline__ int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) +static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) { unsigned long _tmp = fd / __NFDBITS; unsigned long _rem = fd % __NFDBITS; @@ -81,7 +81,7 @@ static __inline__ int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) * for 256 and 1024-bit fd_sets respectively) */ #undef __FD_ZERO -static __inline__ void __FD_ZERO(__kernel_fd_set *p) +static inline void __FD_ZERO(__kernel_fd_set *p) { unsigned long *tmp = p->fds_bits; int i; diff --git a/include/asm-sparc64/sbus.h b/include/asm-sparc64/sbus.h index 0151cad486f3..24a04a55cf85 100644 --- a/include/asm-sparc64/sbus.h +++ b/include/asm-sparc64/sbus.h @@ -29,12 +29,12 @@ * numbers + offsets, and vice versa. */ -static __inline__ unsigned long sbus_devaddr(int slotnum, unsigned long offset) +static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset) { return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<28)+(offset)); } -static __inline__ int sbus_dev_slot(unsigned long dev_addr) +static inline int sbus_dev_slot(unsigned long dev_addr) { return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>28); } diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h index cf7807813e85..63b7040e8134 100644 --- a/include/asm-sparc64/spitfire.h +++ b/include/asm-sparc64/spitfire.h @@ -1,7 +1,6 @@ -/* $Id: spitfire.h,v 1.18 2001/11/29 16:42:10 kanoj Exp $ - * spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations. +/* spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations. * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1996 David S. Miller (davem@davemloft.net) */ #ifndef _SPARC64_SPITFIRE_H @@ -67,7 +66,7 @@ extern void cheetah_enable_pcache(void); /* The data cache is write through, so this just invalidates the * specified line. */ -static __inline__ void spitfire_put_dcache_tag(unsigned long addr, unsigned long tag) +static inline void spitfire_put_dcache_tag(unsigned long addr, unsigned long tag) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" @@ -81,7 +80,7 @@ static __inline__ void spitfire_put_dcache_tag(unsigned long addr, unsigned long * a flush instruction (to any address) is sufficient to handle * this issue after the line is invalidated. */ -static __inline__ void spitfire_put_icache_tag(unsigned long addr, unsigned long tag) +static inline void spitfire_put_icache_tag(unsigned long addr, unsigned long tag) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" @@ -89,7 +88,7 @@ static __inline__ void spitfire_put_icache_tag(unsigned long addr, unsigned long : "r" (tag), "r" (addr), "i" (ASI_IC_TAG)); } -static __inline__ unsigned long spitfire_get_dtlb_data(int entry) +static inline unsigned long spitfire_get_dtlb_data(int entry) { unsigned long data; @@ -103,7 +102,7 @@ static __inline__ unsigned long spitfire_get_dtlb_data(int entry) return data; } -static __inline__ unsigned long spitfire_get_dtlb_tag(int entry) +static inline unsigned long spitfire_get_dtlb_tag(int entry) { unsigned long tag; @@ -113,7 +112,7 @@ static __inline__ unsigned long spitfire_get_dtlb_tag(int entry) return tag; } -static __inline__ void spitfire_put_dtlb_data(int entry, unsigned long data) +static inline void spitfire_put_dtlb_data(int entry, unsigned long data) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" @@ -122,7 +121,7 @@ static __inline__ void spitfire_put_dtlb_data(int entry, unsigned long data) "i" (ASI_DTLB_DATA_ACCESS)); } -static __inline__ unsigned long spitfire_get_itlb_data(int entry) +static inline unsigned long spitfire_get_itlb_data(int entry) { unsigned long data; @@ -136,7 +135,7 @@ static __inline__ unsigned long spitfire_get_itlb_data(int entry) return data; } -static __inline__ unsigned long spitfire_get_itlb_tag(int entry) +static inline unsigned long spitfire_get_itlb_tag(int entry) { unsigned long tag; @@ -146,7 +145,7 @@ static __inline__ unsigned long spitfire_get_itlb_tag(int entry) return tag; } -static __inline__ void spitfire_put_itlb_data(int entry, unsigned long data) +static inline void spitfire_put_itlb_data(int entry, unsigned long data) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" @@ -155,7 +154,7 @@ static __inline__ void spitfire_put_itlb_data(int entry, unsigned long data) "i" (ASI_ITLB_DATA_ACCESS)); } -static __inline__ void spitfire_flush_dtlb_nucleus_page(unsigned long page) +static inline void spitfire_flush_dtlb_nucleus_page(unsigned long page) { __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" "membar #Sync" @@ -163,7 +162,7 @@ static __inline__ void spitfire_flush_dtlb_nucleus_page(unsigned long page) : "r" (page | 0x20), "i" (ASI_DMMU_DEMAP)); } -static __inline__ void spitfire_flush_itlb_nucleus_page(unsigned long page) +static inline void spitfire_flush_itlb_nucleus_page(unsigned long page) { __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" "membar #Sync" @@ -172,7 +171,7 @@ static __inline__ void spitfire_flush_itlb_nucleus_page(unsigned long page) } /* Cheetah has "all non-locked" tlb flushes. */ -static __inline__ void cheetah_flush_dtlb_all(void) +static inline void cheetah_flush_dtlb_all(void) { __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" "membar #Sync" @@ -180,7 +179,7 @@ static __inline__ void cheetah_flush_dtlb_all(void) : "r" (0x80), "i" (ASI_DMMU_DEMAP)); } -static __inline__ void cheetah_flush_itlb_all(void) +static inline void cheetah_flush_itlb_all(void) { __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" "membar #Sync" @@ -202,7 +201,7 @@ static __inline__ void cheetah_flush_itlb_all(void) * ASI_{D,I}TLB_DATA_ACCESS loads, doing the load twice fixes * the problem for me. -DaveM */ -static __inline__ unsigned long cheetah_get_ldtlb_data(int entry) +static inline unsigned long cheetah_get_ldtlb_data(int entry) { unsigned long data; @@ -215,7 +214,7 @@ static __inline__ unsigned long cheetah_get_ldtlb_data(int entry) return data; } -static __inline__ unsigned long cheetah_get_litlb_data(int entry) +static inline unsigned long cheetah_get_litlb_data(int entry) { unsigned long data; @@ -228,7 +227,7 @@ static __inline__ unsigned long cheetah_get_litlb_data(int entry) return data; } -static __inline__ unsigned long cheetah_get_ldtlb_tag(int entry) +static inline unsigned long cheetah_get_ldtlb_tag(int entry) { unsigned long tag; @@ -240,7 +239,7 @@ static __inline__ unsigned long cheetah_get_ldtlb_tag(int entry) return tag; } -static __inline__ unsigned long cheetah_get_litlb_tag(int entry) +static inline unsigned long cheetah_get_litlb_tag(int entry) { unsigned long tag; @@ -252,7 +251,7 @@ static __inline__ unsigned long cheetah_get_litlb_tag(int entry) return tag; } -static __inline__ void cheetah_put_ldtlb_data(int entry, unsigned long data) +static inline void cheetah_put_ldtlb_data(int entry, unsigned long data) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" @@ -262,7 +261,7 @@ static __inline__ void cheetah_put_ldtlb_data(int entry, unsigned long data) "i" (ASI_DTLB_DATA_ACCESS)); } -static __inline__ void cheetah_put_litlb_data(int entry, unsigned long data) +static inline void cheetah_put_litlb_data(int entry, unsigned long data) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" @@ -272,7 +271,7 @@ static __inline__ void cheetah_put_litlb_data(int entry, unsigned long data) "i" (ASI_ITLB_DATA_ACCESS)); } -static __inline__ unsigned long cheetah_get_dtlb_data(int entry, int tlb) +static inline unsigned long cheetah_get_dtlb_data(int entry, int tlb) { unsigned long data; @@ -284,7 +283,7 @@ static __inline__ unsigned long cheetah_get_dtlb_data(int entry, int tlb) return data; } -static __inline__ unsigned long cheetah_get_dtlb_tag(int entry, int tlb) +static inline unsigned long cheetah_get_dtlb_tag(int entry, int tlb) { unsigned long tag; @@ -294,7 +293,7 @@ static __inline__ unsigned long cheetah_get_dtlb_tag(int entry, int tlb) return tag; } -static __inline__ void cheetah_put_dtlb_data(int entry, unsigned long data, int tlb) +static inline void cheetah_put_dtlb_data(int entry, unsigned long data, int tlb) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" @@ -304,7 +303,7 @@ static __inline__ void cheetah_put_dtlb_data(int entry, unsigned long data, int "i" (ASI_DTLB_DATA_ACCESS)); } -static __inline__ unsigned long cheetah_get_itlb_data(int entry) +static inline unsigned long cheetah_get_itlb_data(int entry) { unsigned long data; @@ -317,7 +316,7 @@ static __inline__ unsigned long cheetah_get_itlb_data(int entry) return data; } -static __inline__ unsigned long cheetah_get_itlb_tag(int entry) +static inline unsigned long cheetah_get_itlb_tag(int entry) { unsigned long tag; @@ -327,7 +326,7 @@ static __inline__ unsigned long cheetah_get_itlb_tag(int entry) return tag; } -static __inline__ void cheetah_put_itlb_data(int entry, unsigned long data) +static inline void cheetah_put_itlb_data(int entry, unsigned long data) { __asm__ __volatile__("stxa %0, [%1] %2\n\t" "membar #Sync" diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h index 3f175fa7e6d2..159e62b51d70 100644 --- a/include/asm-sparc64/system.h +++ b/include/asm-sparc64/system.h @@ -1,4 +1,3 @@ -/* $Id: system.h,v 1.69 2002/02/09 19:49:31 davem Exp $ */ #ifndef __SPARC64_SYSTEM_H #define __SPARC64_SYSTEM_H @@ -240,7 +239,7 @@ static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long extern void __xchg_called_with_bad_pointer(void); -static __inline__ unsigned long __xchg(unsigned long x, __volatile__ void * ptr, +static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size) { switch (size) { @@ -263,7 +262,7 @@ extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noret #define __HAVE_ARCH_CMPXCHG 1 -static __inline__ unsigned long +static inline unsigned long __cmpxchg_u32(volatile int *m, int old, int new) { __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" @@ -276,7 +275,7 @@ __cmpxchg_u32(volatile int *m, int old, int new) return new; } -static __inline__ unsigned long +static inline unsigned long __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new) { __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" @@ -293,7 +292,7 @@ __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new) if something tries to do an invalid cmpxchg(). */ extern void __cmpxchg_called_with_bad_pointer(void); -static __inline__ unsigned long +static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) { switch (size) { diff --git a/include/asm-sparc64/upa.h b/include/asm-sparc64/upa.h index 7ae09a22e408..5b1633223f92 100644 --- a/include/asm-sparc64/upa.h +++ b/include/asm-sparc64/upa.h @@ -1,4 +1,3 @@ -/* $Id: upa.h,v 1.3 1999/09/21 14:39:47 davem Exp $ */ #ifndef _SPARC64_UPA_H #define _SPARC64_UPA_H @@ -25,7 +24,7 @@ /* UPA I/O space accessors */ #if defined(__KERNEL__) && !defined(__ASSEMBLY__) -static __inline__ unsigned char _upa_readb(unsigned long addr) +static inline unsigned char _upa_readb(unsigned long addr) { unsigned char ret; @@ -36,7 +35,7 @@ static __inline__ unsigned char _upa_readb(unsigned long addr) return ret; } -static __inline__ unsigned short _upa_readw(unsigned long addr) +static inline unsigned short _upa_readw(unsigned long addr) { unsigned short ret; @@ -47,7 +46,7 @@ static __inline__ unsigned short _upa_readw(unsigned long addr) return ret; } -static __inline__ unsigned int _upa_readl(unsigned long addr) +static inline unsigned int _upa_readl(unsigned long addr) { unsigned int ret; @@ -58,7 +57,7 @@ static __inline__ unsigned int _upa_readl(unsigned long addr) return ret; } -static __inline__ unsigned long _upa_readq(unsigned long addr) +static inline unsigned long _upa_readq(unsigned long addr) { unsigned long ret; @@ -69,28 +68,28 @@ static __inline__ unsigned long _upa_readq(unsigned long addr) return ret; } -static __inline__ void _upa_writeb(unsigned char b, unsigned long addr) +static inline void _upa_writeb(unsigned char b, unsigned long addr) { __asm__ __volatile__("stba\t%0, [%1] %2\t/* upa_writeb */" : /* no outputs */ : "r" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); } -static __inline__ void _upa_writew(unsigned short w, unsigned long addr) +static inline void _upa_writew(unsigned short w, unsigned long addr) { __asm__ __volatile__("stha\t%0, [%1] %2\t/* upa_writew */" : /* no outputs */ : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); } -static __inline__ void _upa_writel(unsigned int l, unsigned long addr) +static inline void _upa_writel(unsigned int l, unsigned long addr) { __asm__ __volatile__("stwa\t%0, [%1] %2\t/* upa_writel */" : /* no outputs */ : "r" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); } -static __inline__ void _upa_writeq(unsigned long q, unsigned long addr) +static inline void _upa_writeq(unsigned long q, unsigned long addr) { __asm__ __volatile__("stxa\t%0, [%1] %2\t/* upa_writeq */" : /* no outputs */ diff --git a/include/asm-sparc64/visasm.h b/include/asm-sparc64/visasm.h index a74078551e0f..34f2ec64933b 100644 --- a/include/asm-sparc64/visasm.h +++ b/include/asm-sparc64/visasm.h @@ -1,4 +1,3 @@ -/* $Id: visasm.h,v 1.5 2001/04/24 01:09:12 davem Exp $ */ #ifndef _SPARC64_VISASM_H #define _SPARC64_VISASM_H @@ -44,7 +43,7 @@ wr %o5, 0, %fprs; #ifndef __ASSEMBLY__ -static __inline__ void save_and_clear_fpu(void) { +static inline void save_and_clear_fpu(void) { __asm__ __volatile__ ( " rd %%fprs, %%o5\n" " andcc %%o5, %0, %%g0\n" |