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| author | Manasi Navare <manasi.d.navare@intel.com> | 2020-06-20 02:53:54 +0530 |
|---|---|---|
| committer | Manasi Navare <manasi.d.navare@intel.com> | 2020-06-19 12:59:03 -0700 |
| commit | 24cfbec99647d241c3c31a72d247ee81f9061b5b (patch) | |
| tree | 47f14f6d25affa786611065f5d7df1d6ab7506ae /include/drm | |
| parent | 5f368ddea6fec519bdb93b5368f6a844b6ea27a6 (diff) | |
| download | linux-24cfbec99647d241c3c31a72d247ee81f9061b5b.tar.gz linux-24cfbec99647d241c3c31a72d247ee81f9061b5b.tar.bz2 linux-24cfbec99647d241c3c31a72d247ee81f9061b5b.zip | |
drm/dp: DRM DP helper for reading Ignore MSA from DPCD
DP sink device sets the Ignore MSA bit in its
DP_DOWNSTREAM_PORT_COUNT register to indicate its ability to
ignore the MSA video timing parameters and its ability to support
seamless video timing change over a range of timing exposed by
DisplayID and EDID.
This is required for the sink to indicate that it is Adaptive sync
capable.
v3:
* Fi the typo in commit message (Manasi)
v2:
* Rename to describe what the function does (Jani Nikula)
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200619212356.19285-2-bhanuprakash.modem@intel.com
Diffstat (limited to 'include/drm')
| -rw-r--r-- | include/drm/drm_dp_helper.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index aed08e8cb22c..92b8d326ab4a 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1324,6 +1324,14 @@ drm_dp_alternate_scrambler_reset_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) DP_ALTERNATE_SCRAMBLER_RESET_CAP; } +/* Ignore MSA timing for Adaptive Sync support on DP 1.4 */ +static inline bool +drm_dp_sink_can_do_video_without_timing_msa(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) +{ + return dpcd[DP_DOWN_STREAM_PORT_COUNT] & + DP_MSA_TIMING_PAR_IGNORED; +} + /* * DisplayPort AUX channel */ |