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authorDave Airlie <airlied@redhat.com>2017-04-19 13:15:18 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 17:05:12 -0400
commitac58fff1551672c925b0ec2879c4653a69771ee2 (patch)
tree2fb90e7168f475bb1e1c4b74809141d7c52b302e /include/drm
parentfb735a9f29f94fcb29fee224b8da704a510a5a3a (diff)
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drm/dp-helper: add missing defines needed by AMD display core.
These are all the ones required by the AMD display core. Signed-off-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/drm_dp_helper.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index b17476a6909c..d9fab1e1818a 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -510,6 +510,8 @@
# define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK 0xc0
# define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT 6
+#define DP_ADJUST_REQUEST_POST_CURSOR2 0x20c
+
#define DP_TEST_REQUEST 0x218
# define DP_TEST_LINK_TRAINING (1 << 0)
# define DP_TEST_LINK_VIDEO_PATTERN (1 << 1)
@@ -582,6 +584,8 @@
#define DP_TEST_REFRESH_RATE_NUMERATOR 0x234
+#define DP_TEST_MISC0 0x232
+
#define DP_TEST_CRC_R_CR 0x240
#define DP_TEST_CRC_G_Y 0x242
#define DP_TEST_CRC_B_CB 0x244
@@ -590,6 +594,18 @@
# define DP_TEST_CRC_SUPPORTED (1 << 5)
# define DP_TEST_COUNT_MASK 0xf
+#define DP_TEST_PHY_PATTERN 0x248
+#define DP_TEST_80BIT_CUSTOM_PATTERN_7_0 0x250
+#define DP_TEST_80BIT_CUSTOM_PATTERN_15_8 0x251
+#define DP_TEST_80BIT_CUSTOM_PATTERN_23_16 0x252
+#define DP_TEST_80BIT_CUSTOM_PATTERN_31_24 0x253
+#define DP_TEST_80BIT_CUSTOM_PATTERN_39_32 0x254
+#define DP_TEST_80BIT_CUSTOM_PATTERN_47_40 0x255
+#define DP_TEST_80BIT_CUSTOM_PATTERN_55_48 0x256
+#define DP_TEST_80BIT_CUSTOM_PATTERN_63_56 0x257
+#define DP_TEST_80BIT_CUSTOM_PATTERN_71_64 0x258
+#define DP_TEST_80BIT_CUSTOM_PATTERN_79_72 0x259
+
#define DP_TEST_RESPONSE 0x260
# define DP_TEST_ACK (1 << 0)
# define DP_TEST_NAK (1 << 1)
@@ -611,6 +627,7 @@
#define DP_SINK_OUI 0x400
#define DP_BRANCH_OUI 0x500
#define DP_BRANCH_ID 0x503
+#define DP_BRANCH_REVISION_START 0x509
#define DP_BRANCH_HW_REV 0x509
#define DP_BRANCH_SW_REV 0x50A
@@ -738,6 +755,9 @@
#define DP_RECEIVER_ALPM_STATUS 0x200b /* eDP 1.4 */
# define DP_ALPM_LOCK_TIMEOUT_ERROR (1 << 0)
+#define DP_DP13_DPCD_REV 0x2200
+#define DP_DP13_MAX_LINK_RATE 0x2201
+
#define DP_DPRX_FEATURE_ENUMERATION_LIST 0x2210 /* DP 1.3 */
# define DP_GTC_CAP (1 << 0) /* DP 1.3 */
# define DP_SST_SPLIT_SDP_CAP (1 << 1) /* DP 1.4 */