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| author | Chanwoo Choi <cw00.choi@samsung.com> | 2015-02-02 23:24:04 +0900 |
|---|---|---|
| committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2015-02-04 18:58:13 +0100 |
| commit | 5785d6e61f27f7af4d239c1647d5a22e0dbff19b (patch) | |
| tree | da9553916b683c6972978d809b100d5866562349 /include/dt-bindings/soc | |
| parent | 2e997c035945784fb8c564305c0f0ddacc374fe4 (diff) | |
| download | linux-5785d6e61f27f7af4d239c1647d5a22e0dbff19b.tar.gz linux-5785d6e61f27f7af4d239c1647d5a22e0dbff19b.tar.bz2 linux-5785d6e61f27f7af4d239c1647d5a22e0dbff19b.zip | |
clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains
This patch adds the mux/divider/gate clocks for CMU_BUS{0|1|2} domains
which contain global data buses clocked at up the 400MHz. These blocks
transfer data between DRAM and various sub-blocks. These clock domains
also contain global peripheral buses clocked at 67/111/200/222/266/333/400
MHz and used for register accesses.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'include/dt-bindings/soc')
0 files changed, 0 insertions, 0 deletions