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author | Stephen Boyd <sboyd@codeaurora.org> | 2016-02-08 14:01:10 -0800 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-02-08 14:01:10 -0800 |
commit | f2626ba96543c21a46228aa0d7dc20b70b8f7d36 (patch) | |
tree | c2872884b444d673d15351a3715c341ab43948e9 /include/dt-bindings | |
parent | 1e42754eacdb1c8632c3af47263c56967e04cbd1 (diff) | |
parent | 0e954fea5be056d13945a124bdf2b7e358d1554d (diff) | |
download | linux-f2626ba96543c21a46228aa0d7dc20b70b8f7d36.tar.gz linux-f2626ba96543c21a46228aa0d7dc20b70b8f7d36.tar.bz2 linux-f2626ba96543c21a46228aa0d7dc20b70b8f7d36.zip |
Merge branch 'clk-fixes' into clk-next
* clk-fixes:
clk: tegra: super: Fix sparse warnings for functions not declared as static
clk: tegra: Fix sparse warnings for functions not declared as static
clk: tegra: Fix sparse warning for pll_m
clk: tegra: Use definition for pll_u override bit
clk: tegra: Fix warning caused by pll_u failing to lock
clk: tegra: Fix clock sources for Tegra210 EMC
clk: tegra: Add the APB2APE audio clock on Tegra210
clk: tegra: Add missing of_node_put()
clk: tegra: Fix PLLE SS coefficients
clk: tegra: Fix typos around clearing PLLE bits during enable
clk: tegra: Do not disable PLLE when under hardware control
clk: tegra: Fix pllx dyn step calculation
clk: tegra: pll: Fix potential sleeping-while-atomic
clk: tegra: Fix the misnaming of nvenc from msenc
clk: tegra: Fix naming of MISC registers
clk: tegra: Remove improper flags for lock_enable
clk: tegra: Fix divider on VI_I2C
Diffstat (limited to 'include/dt-bindings')
-rw-r--r-- | include/dt-bindings/clock/tegra210-car.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/tegra210-car.h b/include/dt-bindings/clock/tegra210-car.h index 6f45aea49e4f..0a05b0d36ae7 100644 --- a/include/dt-bindings/clock/tegra210-car.h +++ b/include/dt-bindings/clock/tegra210-car.h @@ -126,7 +126,7 @@ /* 104 */ /* 105 */ #define TEGRA210_CLK_D_AUDIO 106 -/* 107 ( affects abp -> ape) */ +#define TEGRA210_CLK_APB2APE 107 /* 108 */ /* 109 */ /* 110 */ |