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| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2015-12-08 14:46:54 +0100 |
|---|---|---|
| committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2015-12-16 16:35:17 +0100 |
| commit | c0feb268da73ae3ede23ae60d6ccc551c4e93250 (patch) | |
| tree | 6b4bf20cd145c4984ebe9cf8a17d8530e6368a1c /include/dt-bindings | |
| parent | 9f9499ae8e6415cefc4fe0a96ad0e27864353c89 (diff) | |
| download | linux-c0feb268da73ae3ede23ae60d6ccc551c4e93250.tar.gz linux-c0feb268da73ae3ede23ae60d6ccc551c4e93250.tar.bz2 linux-c0feb268da73ae3ede23ae60d6ccc551c4e93250.zip | |
clk: samsung: exynos542x: add missing parent GSCL block clocks
This patch adds clocks, which are required for preserving parent clock
configuration on GSCL power domain on/off.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/exynos5420.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h index 99da0d117a7d..b5af23afb974 100644 --- a/include/dt-bindings/clock/exynos5420.h +++ b/include/dt-bindings/clock/exynos5420.h @@ -210,6 +210,8 @@ #define CLK_MOUT_SW_ACLK300 649 #define CLK_MOUT_USER_ACLK400_DISP1 650 #define CLK_MOUT_SW_ACLK400 651 +#define CLK_MOUT_USER_ACLK300_GSCL 652 +#define CLK_MOUT_SW_ACLK300_GSCL 653 /* divider clocks */ #define CLK_DOUT_PIXEL 768 |