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| author | Andrew Bresticker <abrestic@chromium.org> | 2014-11-12 11:43:37 -0800 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 07:45:30 +0100 |
| commit | 2ff404005e9f94ee3d05b6b0dac8204c1fcc2346 (patch) | |
| tree | ecc4814beecb19dd6ffc94a9404035d37979a1e7 /include/dt-bindings | |
| parent | ebf71ec7e14bd55d0114f625686304979ecff4d0 (diff) | |
| download | linux-2ff404005e9f94ee3d05b6b0dac8204c1fcc2346.tar.gz linux-2ff404005e9f94ee3d05b6b0dac8204c1fcc2346.tar.bz2 linux-2ff404005e9f94ee3d05b6b0dac8204c1fcc2346.zip | |
of: Add binding document for MIPS GIC
The Global Interrupt Controller (GIC) present on certain MIPS systems
can be used to route external interrupts to individual VPEs and CPU
interrupt vectors. It also supports a timer and software-generated
interrupts.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8420/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/interrupt-controller/mips-gic.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/include/dt-bindings/interrupt-controller/mips-gic.h b/include/dt-bindings/interrupt-controller/mips-gic.h new file mode 100644 index 000000000000..cf35a577e371 --- /dev/null +++ b/include/dt-bindings/interrupt-controller/mips-gic.h @@ -0,0 +1,9 @@ +#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H +#define _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H + +#include <dt-bindings/interrupt-controller/irq.h> + +#define GIC_SHARED 0 +#define GIC_LOCAL 1 + +#endif |